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Check the next-to-last slide on the linked presentation. 50X smaller than typical VR components usually placed next to the CPU. http://www.psma.com/sites/default/files/uploads/tech-forums-nanotechnology/resources/400a-fully-integrated-silicon-voltage-regulator.pdf

Check out pages 7-9 or so for the magnetics and inductors: http://www.psma.com/sites/default/files/uploads/tech-forums-nanotechnology/resources/400a-fully-integrated-silicon-voltage-regulator.pdf

Bollocks! Since the internal VR uses the same process as the CPU itself, it can't sustain high input voltages, therefore a one-stage 12V to 0.9V conversion is just a pipe dream.

The longer pdf presentation actually shows the motherboard-level 12V to 2.2V VR, which would be still rated for the full power (85W plus margin). OTOH, it's quite impressive that the 22nm process has support for 2.2V CMOS.

The actual FIVR don't use the same process as the CPU. It's a separete die using a 90nm process. Read the page 7 of http://www.psma.com/sites/default/files/uploads/tech-forums-nanotechnology/resources/400a-fully-integrated-silicon-voltage-regulator.pdf for the details.

http://www.psma.com/sites/default/files/uploads/tech-forums-nanotechnology/resources/400a-fully-integrated-silicon-voltage-regulator.pdf

Can someone please tell me why this is a good idea

The long story is here (PDF). Motherboard will still do the heavy lifting from 12V to 2.4V, but the integrated VRM will distribute it. Advantage is extremely clean, fine-grained, low-latency and flexible power supply to deliver exactly as much power to where it's needed and probably - this is just speculation on my part - allowing the CPU to work on a wider range of voltages since there's less noise and ripple so you don't need the same tolerance limits. It sounds perfect for smart phones, tablets and laptops that are primarily battery-limited, nice to have for average machines but potentially an issue for overclockers. All you need is cooling though, it shouldn't limit overclocking if you can keep the temp down.

You can find the full slide set in PDF format here.

If I read this right, it really is a fully on-chip switching regulator, inductors and all. They already have a test chip that they used to power a ~90W Xeon E7330 for four hours while it ran Linpack. (Or a virus -- it says Linpack in the summary page.) Voltage ripple is less than 2mV. Peak efficiency per cell looks like ~76% at 8A. They claim hitting 82% would be easy, and there are "additional advancements that cannot be reported at this time" planned for the future.

The slides have bunch of other technical details about testability features, too, which is always neat to see.