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Given the requirements of Simics, and that the Java x86 emulator in question can run inside a BROWSER, I'd say it's quite clear what the advantages are.

from http://www.virtutech.com/products/product-faqs.htm l

Q: What is required to run Simics?

Simics currently supports 32-bit IA32 hosts running Windows (2000 and XP) or Linux, AMD64 and EM64T hosts running Linux, and 64-bit SPARC hosts running Solaris. Minimum requirements to run Simics includes: Pentium 4 processor (for Windows or Linux host) processor, 512MB of RAM, and 500MB of available disk space.

The miss penalty times I googled for review site where they'd benchmarked it. If you look, you can probably get more accurate numbers from Intel. For the disk latency, the manufacturer of a disk will generally report some sort of access latency number, but overall, a "fast" 7200 RPM disk has a latency of about 8 ms.

So far as how malloc() works, well, it is open source. But some discussion on malloc design can be found at http://gee.cs.oswego.edu/dl/html/malloc.html. More simple information can be found linked at http://www.cs.utk.edu/~plank/plank/classes/cs360/l ecture_notes.html (again, just a quick google).

Mostly, it comes down to that my area is systems and architecture. My job is to know all those little details about how things interact. This was just a quickie. No guarantees it is right--I'm using other people's numbers, and just my recollection of how malloc() behaves. If this were more serious than /. then I'd dig through Intel's processor manuals for more exact numbers, figure out which (if any) of those latencies can happen in parallel, measure things myself to verify, etc. I'd also write a small program to do a lot of mallocs and frees and see what addresses are returned to verify the locality properties.

If I were really really serious, I'd come up with a benchmark program that allocates and frees memory, of various sizes with various working sets and object lifetimes, and measure the execution time for both Java and C. I'd use something like VTune (http://www.intel.com/cd/software/products/asmo-na /eng/vtune/index.htm) or SimICS (http://www.virtutech.com/) (with a timing model, say GEMS (http://www.cs.wisc.edu/gems/tutorial.html)) to analyze exactly where the differences are coming from.

And then I'd write it up and submit the results to SIGMETRICS, PLDI, OOPSLA, or some other conference, because I just spent a metric butload of time tracing down shortcomings in the GC implementation of various JVMs as compared to programmer managed memory allocation. If somebody is willing to pay me, I still might, but as it is, back of the envelope is all you'll get.

Actually, there exists a PPC simulator. It is made by Virtutech. Haven't tried it, though, so I don't know how well it works.

History isn't just in the past. AMD's next processor, codenamed the Hammer, will be the first x86-64 instruction set CPU. To kick start projects wishing to make good use of this 64bit extension to x86, AMD developed and made freely (beer) available virtual machine called SimNow over a year before the chip is due to launch.

What I found particularly interesting was that this seemingly hopefull project was taken up so well that Simics thought it prudent to add x86-64 support to thier existing commercial multi-architecture simulator.

The good news in all of this is that Linux and a fair few of the GNU tools are x86-64 ready now, well in advance of any x86-64 chips' release.

I think AMD has a different plan for simulating ClawHammer than using Transmeta technology. AMD recently announced it is teaming up with Virutech a Swedish startup that produces Simics, a full system simulator. You can find out more see AMD's press release and Virtutech's press release.