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big.LITTLE: ARM's Strategy For Efficient Computing
MojoKid writes "big.LITTLE is ARM's solution to a particularly nasty problem: smaller and smaller process nodes no longer deliver the kind of overall power consumption improvements they did years ago. Before 90nm technology, semiconductor firms could count on new chips being smaller, faster, and drawing less power at a given frequency. Eventually, that stopped being true. Tighter process geometries still pack more transistors per square millimeter, but the improvements to power consumption and maximum frequency have been falling with each smaller node. Rising defect densities have created a situation where — for the first time ever — 20nm wafers won't be cheaper than the 28nm processors they're supposed to replace. This is a critical problem for the mobile market, where low power consumption is absolutely vital. big.LITTLE is ARM's answer to this problem. The strategy requires manufacturers to implement two sets of cores — the Cortex-A7 and Cortex-A15 are the current match-up. The idea is for the little cores to handle the bulk of the device's work, with the big cores used for occasional heavy lifting. ARM's argument is that this approach is superior to dynamic voltage and frequency scaling (DVFS) because it's impossible for a single CPU architecture to retain a linear performance/power curve across its entire frequency range. This is the same argument Nvidia made when it built the Companion Core in Tegra 3."
It's a way for ARM to double their royalty per chip while also doubling the leakage power.
This solution _might_ be more power efficient. But it can not be more die and space efficient. Looking at keeping die sizes down to place more other crap on the die's, a ginormous core complex does not really fit the bill. Besides, if you want to keep core context switch times low, you must keep all caches etc on the larger cores hot and that draws power. This solution probably fits when you start a game, so that you have an explicit trigger to switch to the larger cores. If you are talking on demand ultra low latency switches, then again, keeping those cores hot costs power.
An asymmetric SMP machine is nothing new. An on-demand asymmetric SMP machine is something different however.
I still maintain that single-threaded performance (with a properly implemented, non retarded OS) far outweighs multi-threaded performance, so making an effort to starve those larger cores and still maintain power budget is probably the best bet anyway. (Intel x86).
Advertising much?
I can imagine the comments made to 3dfx Interactive back in the day:
"Wait wait wait, you mean that it's better to create a SEPARATE processing unit to handle graphics? Why not just lump it all on the CPU? You're crazy!!!"
Use the best tool for the best job I suppose.
Some marketdroid had a field day finding that name, sheesh...
I would have added "i" in front of it, personally. Everybody knows i-anything is teh kewl these days.
"A door is what a dog is perpetually on the wrong side of" - Ogden Nash
Its like a hybrid vehicle, when you only need to go slow it runs on a small motor, when you need power the big engine kicks in but needs more juice.
Big/little is a lazy way out of the power problem... Because instead of investing in design and development and in fine grained power control in your processor, you make the design decision of, "Heck with this -- silicon is cheap!" and throw away a good chunk of silicon when the processor goes into a different power mode... You have no graceful scaling -- just a brute force throttle and a clunky interface for the Kernel.
So, not all ARM licensees have been convinced or seen the need to go to a big/little architecture because big/little has that big disadvantages of added complexity and wasted realestate (and cost) on the die. Unlike nVidea (Tegra) and Samsung (Exynos), Qualcomm has been able to thus far keep power under control in their Snapdragon designs without having to resort to a big/little and has thus been able to excel on the phone. So far, the Qualcomm strategy seems to be a winning one for phones in terms of both overall power savings and performance per miliwatt -- where on phones every extra hour of battery life is a cherished commodity. Such may not be true for tablets that can stand to have larger batteries and where performance at "some reasonable expectation" of battery life may be the more important.
If this is effective, what keeps ARM's competition from implementing the same thing?
Rising defect densities have created a situation where — for the first time ever — 20nm wafers won't be cheaper than the 28nm processors they're supposed to replace.
The economic part is often left out on tech sites discussions, but it matters a lot. Up to now we had a sustainable situation where the cost of new processes increased regularly, but at the same time eventually the cost of the new process was lower. This allowed to get all on board and to also increase the reachable market, to get more revenues. That's why we have small micro-controllers everywhere nowadays.
Now when the cost of new processes increases, only the part of the market that trully need the improved density and performance will move on. And that's only a small part of the whole market. So we will have increasing costs, with a reducing addressable market. Double whammy. Expect end prices for high performance to rise quickly. That may slow down things significantly.
We'll see how it develops soon, but I would expect the economic to bite before we reach tech limits.
Clock scaling is almost useless these days, power gating is where it's at.
Huh? Both ARM and Intel make heavy use of clock scaling (and voltage scaling) to manage power consumption when lightly loaded.
I was once a programer when i was in High School. Since then I've noticed and been told friend who are programers/coders that programming languages now are sloppy when it comes to memory. I've heard also that old languages like Basic, C and other were better at keeping memory processing needs to a minimum. Would a modern language using the smaller memory/processing requirement help things with ever need come with more efficient chip?
The cost of a 45 nm wafer was higher than that of a 65 nm wafer, etc. It was only the cost of an individual die that went down, because with a smaller geometry an equivalent die was smaller, thus there were more of them per wafer.
Covertrail is last gen tech ... never designed with power mangement ... bolt-on tech. These are Intel's excuses.
FTFY
Truth is that all Atoms have been designed to be power efficient and Intel keeps saying that the next Atom will beat ARM. It hasn't happened yet, but that doesn't mean it won't happen in the future.
I'm actually planning to do the same thing at a slightly larger scale with a little two host virtualization cluster at home. One low power host for most of the time when I just need a few VMs with little load, and a second more powerful host to do the heavy lifting when needed. Seems like it should work in theory.
are you making fun of my product LITTLE.biggusdickus?
There is no right to feel safe thru security vaudeville at the expense of everyone's freedom, privacy and tax money.
Came here for a companion cube analogy, leaving disappointed :(
Big/little is a lazy way out of the power problem... Because instead of investing in design and development and in fine grained power control in your processor, you make the design decision of, "Heck with this -- silicon is cheap!" and throw away a good chunk of silicon when the processor goes into a different power mode... You have no graceful scaling -- just a brute force throttle and a clunky interface for the Kernel. So, not all ARM licensees have been convinced or seen the need to go to a big/little architecture because big/little has that big disadvantages of added complexity and wasted realestate (and cost) on the die. Unlike nVidea (Tegra) and Samsung (Exynos), Qualcomm has been able to thus far keep power under control in their Snapdragon designs without having to resort to a big/little and has thus been able to excel on the phone. So far, the Qualcomm strategy seems to be a winning one for phones in terms of both overall power savings and performance per miliwatt -- where on phones every extra hour of battery life is a cherished commodity. Such may not be true for tablets that can stand to have larger batteries and where performance at "some reasonable expectation" of battery life may be the more important. http://equipmentbds.blogspot.com/">please visit it
The same strategy enabled high-EER air conditioning: use a small compressor which runs most of the time plus a larger one to handle peak cooling loads, rather than an even bigger compressor which cycles on and off frequently.