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Intel To Buy Altera For $16.7 Billion

An anonymous reader writes: Today Intel purchased chipmaker Altera for $16.7 billion. This follows another huge purchase in the semiconductor industry last week, when Avago snapped up Broadcom for $37 billion. This has been a record year for consolidation within the industry, as companies struggle to deal with slowing growth and stagnating stock prices. Altera had already rejected an offer from Intel, but shareholders pressured them to reconsider. "Acquiring Altera may help Intel defend and extend its most profitable business: supplying server chips used in data centers. While sales of semiconductors for PCs are declining as more consumers rely on tablets and smartphones to get online, the data centers needed to churn out information and services for those mobile devices are driving orders for higher-end Intel processors and shoring up profitability."

63 comments

  1. Re: I'm proud to be White by Anonymous Coward · · Score: 0

    That's because you have an Altera up your ass?

  2. So, what's the plan? by fuzzyfuzzyfungus · · Score: 2

    Given that FPGAs are big, slow, and hot compared to equivalent logic built as a fixed function chip(but with the obvious benefit of not being fixed function), Altera FPGAs manufactured on the fanciest processes available seem like a fairly obvious product of the acquisition.

    Any bets on what other purposes they have in mind? FPGAs with one or more QPI links built in, for fast interconnect with Xeons? Xeons with FPGAs on die? Intel NICs with substantially greater packet-mangling capabilities, at full wire speed, thanks to reconfigurable logic?

    Merely producing FPGAs on a nice process is logical; but could also be done just by selling them fab services. They presumably have a plan that goes beyond that.

    1. Re:So, what's the plan? by Luthair · · Score: 1

      I seem to recall that Intel had been selling excess fab space to Altera (along with a few other non-competitors) a few years back.

    2. Re:So, what's the plan? by Anonymous Coward · · Score: 4, Interesting

      FPGA's can out perform Pentium i7s in certain scenarios. Here is a video showing how a 200 MHz FPGA can perform a discrete wavelet twice as fast as an 2.6 GHz i7.

      https://www.youtube.com/watch?v=Er9luiBa32k

      The future will be offloading certain tasks to the FPGA, as well as providing downloadable modules that will allow any PC to take on a wide range of roles. One application could be an SDR without any additional hardware, or a data acquisition unit. So, this is all about flexible I/O and optimised processing.

    3. Re:So, what's the plan? by Lunix+Nutcase · · Score: 4, Interesting

      Intel announced Xeons with FPGAs last year.

    4. Re:So, what's the plan? by Luthair · · Score: 0

      When will the Pentium i7 be released? ;)

    5. Re:So, what's the plan? by Andy+Dodd · · Score: 1

      IIRC, wasn't that in partnership with Altera?

      Intel and Altera have been partnering on things for quite a while, including Altera being one of the first companies to be allowed access to spare Intel fab production capacity.

      --
      retrorocket.o not found, launch anyway?
    6. Re:So, what's the plan? by Lunix+Nutcase · · Score: 1

      I don't think anyone said specifically but that's what everyone assumed.

    7. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      One application could be an SDR without any additional hardware

      Well, you do need an antenna.

      But how about, say, slowing music down without changing the pitch? (and having it be instantaneous => smoothly variable, unlike existing stuff)

    8. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      Also, it's just occurred to me that you could "download more RAM" then. Have the FPGA be a ramdisk, have the OS use it as swap That's RAM then.

    9. Re:So, what's the plan? by erice · · Score: 1

      Given that FPGAs are big, slow, and hot compared to equivalent logic built as a fixed function chip(but with the obvious benefit of not being fixed function), Altera FPGAs manufactured on the fanciest processes available seem like a fairly obvious product of the acquisition..

      That was going to happen anyway. Atlera announced that they were going to manufacture on Intel's newest process back in 2013.

    10. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      Doesn't Intel already fab some of Altera's more high end FPGA products?

      Normally Intel doesn't share it's fab capacity with anyone but there are some money-is-no-object applications that command a price that Intel can't ignore.

      Think ultra-high-end stock trading (Where they do exotic shit like cram logic in to the /network cable end/ to reduce latency) and DoD - I've heard things like 60k+ per die for some of tip-top-end stuff.

    11. Re:So, what's the plan? by Anonymous Coward · · Score: 1

      >Xeons with FPGAs on die?

      Intel already did it and the speculation was that it was with Altera.

      http://www.extremetech.com/extreme/184828-intel-unveils-new-xeon-chip-with-integrated-fpga-touts-20x-performance-boost

      Moore's law is basically running out of steam in a variety of ways so everybody is looking for architectural changes that will allow a way to squeeze more performance out of the same number of transistors. There's been a lot of work in working out how to use field programmable logic to accelerate common processing tasks (e.g. Alessandro Forin's fascinating work on integrating field programmable logic as a execution unit to create custom CPU instructions on the fly) and it's finally getting to the point where it makes economic sense.

    12. Re:So, what's the plan? by edmudama · · Score: 1

      Memory processes in FPGAs aren't very good. You'd have to really be desperate for a few hundred megabytes of extra memory.

      --
      More data, damnit!
    13. Re:So, what's the plan? by Svartalf · · Score: 2

      They're big and slow compared to an ASIC, yes.  But the thing is, they're not big and slow overall- they're reconfigurable and you can dynamically change the logic (Witness Altera's OpenCL offering on the higher-end stuff they offer...  You don't offer that unless you're competitive with GPUs...) on the fly.  They have a place and it's not always custom logic.  It's adaptable custom logic- which ASICs **CANT** do.  CPUs are slow and plodding in many of the tasks you're talking about in that space- and GPUs are cumbersome and painful to use compared to them for that use.

      --
      I am not merely a "consumer" or a "taxpayer". I am a Citizen of the State of Texas
    14. Re:So, what's the plan? by TheRaven64 · · Score: 2

      My guess would be coarse-grained reconfigurable architectures. Altera FPGAs aren't just FPGAs, they also have a load of fixed-function blocks. The kinds of signal processing that the other poster talks about work because there are various floating point blocks on the FPGA and so you're using the programmable part to connect a sequence of these operations together without any instruction fetch/decode or register renaming overhead (you'd be surprised how much of the die area of a modern CPU is register renaming and how little is ALUs).

      FPGAs are great for prototyping (we've built an experimental CPU as a softcore that runs on an Altera FPGA at 100MHz), but there are a lot of applications that could be made faster by being able to wire a set of SSE / AVX execution units together into a fixed chain and just fire data at them.

      --
      I am TheRaven on Soylent News
    15. Re:So, what's the plan? by Anonymous Coward · · Score: 1

      What do they have in mind? They can finally realize technology from 15 years ago! See: http://www.jhauser.us/publications/2000_Callahan_GarpArchAndCompiler.pdf

      In all seriousness, yes, we will see CPUs + FPGAs in the same package and eventually on the same die. Altera's next FPGA is slated to work at 700MHz--1GHz with an extreme amount of off chip IO and memory bandwidth, so it should be suitable for doing high speed packet processing + computation. This is what Tabula was supposed to do, and, surprise surprise, who is running Altera's architecture team? Tabula guys. Not to mention that when it went under, the majority of their team went to Altera.

      Not a whole lot of this will matter unless the FPGA fabric coupled with the CPU is either easy to program and/or cleverly partitioned. Neither are easy, and both require a huge compiler and CAD effort. Intel and Altera will be pushed to their limits to get this to work properly. Hopefully they can pull if off. If not, it will just be another milestone in the failure of FPGAs, which have been losing ground to ASSPs and GPUs for years.

    16. Re:So, what's the plan? by tepples · · Score: 1

      Probably at the next process shrink, once tomorrow's Pentium is as fast as today's Core i7.

    17. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      Sure, all you need is another $3,000 software package (and
      another $2,495 per year to keep it up to date) to let you do
      anything with the FPGA... no problem, right?

      Everyone has that kind of cash laying around for every box
      they own!

    18. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      The markets where you see FPGAs on top are those markets where it's not cost effective to build an ASIC to solve a problem (not high volume enough), and a CPU/GPU/Broadcom ASSP doesn't solve the problem adequately already. That's it. Full stop.

      The number of those markets is shrinking, and has been for years. See Broadcom's market growth vs Xilinx's, for example.

      I love FPGAs more than almost anyone, but until they are easy to program and debug, they will always take a backseat to other technologies.

    19. Re:So, what's the plan? by asliarun · · Score: 1

      Sure, all you need is another $3,000 software package (and
      another $2,495 per year to keep it up to date) to let you do
      anything with the FPGA... no problem, right?

      Everyone has that kind of cash laying around for every box
      they own!

      Oh, you forgot $10k in annual support cost.

      That's absolutely not a problem when you are running computational workloads for your business that has millions riding on it. Doesn't even have to be mission critical stuff. Even for regular analytics (never mind the "big-data" buzzword). $6k for a significant performance boost (even for specific workloads) and reconfigurability is a piddly amount.

    20. Re:So, what's the plan? by Anonymous Coward · · Score: 2, Insightful

      Sure, all you need is another $3,000 software package (and
      another $2,495 per year to keep it up to date) to let you do
      anything with the FPGA... no problem, right?

      Everyone has that kind of cash laying around for every box
      they own!

      A fixed $3,000 that's depreciable and a fixed cost of $2,495 annual support? Relative to the $150,000+ annual cost for an engineer who knows how to use it, that's basically nothing.

      L2Business, kid.

    21. Re:So, what's the plan? by gwjgwj · · Score: 1

      CPUs + FPGAs in the same package is nothing new. Virtex II-pro in 2004, currently Zynq.

    22. Re:So, what's the plan? by Megol · · Score: 2

      Strange then that the FPGA market is growing and the number of ASIC design starts are shrinking per year. It is almost like FPGAs are increasingly being used as ASIC replacements in both the high end (backbone routers, RADAR equipment, ASIC simulation) and the low end (replacing misc logic and often a microcontroller). Maybe because they are.

    23. Re:So, what's the plan? by Bengie · · Score: 1

      CPU+FPGA in $800 gaming rig sounds completely new to me.

    24. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      well, obviously you haven't used an FPGA in about 15 years. Let me introduce you the datasheet for Xilinx's UltraScale generation of FPGA's: http://www.xilinx.com/support/documentation/data_sheets/ds893-virtex-ultrascale-data-sheet.pdf

    25. Re:So, what's the plan? by Anonymous Coward · · Score: 0

      Strange then that the FPGA market is growing and the number of ASIC design starts are shrinking per year. It is almost like FPGAs are increasingly being used as ASIC replacements in both the high end (backbone routers, RADAR equipment, ASIC simulation) and the low end (replacing misc logic and often a microcontroller). Maybe because they are.

      Sounds like you haven't heard of ASSPs! ASIC design starts are approaching zero, yet the FPGA market is more or less unchanged. Why is that? The answer is a company called Broadcom. See: any Gartner report for the last decade. Welcome to 2015!

    26. Re:So, what's the plan? by unixisc · · Score: 1

      Making FPGAs in the first place gives Intel a much broader market throughout the semiconductor industry, since anybody making logic circuitry at the semiconductor level can have it manufactured by them. This makes it more stable for Intel than selling Altera their fab services. That way, Intel can deal w/ a wider variety of customers, rather than Altera being their distribution point.

    27. Re:So, what's the plan? by unixisc · · Score: 1

      Strange then that the FPGA market is growing and the number of ASIC design starts are shrinking per year. It is almost like FPGAs are increasingly being used as ASIC replacements in both the high end (backbone routers, RADAR equipment, ASIC simulation) and the low end (replacing misc logic and often a microcontroller). Maybe because they are.

      The GP provided the answer - markets where it's not cost effective to build an ASIC to solve a problem (not high volume enough). There are plenty of those markets, and unless those products ramp up to justfiy an ASIC tape-out, they'd remain in FPGAs. Far more cost-effective. Also, FPGAs allow one to iron out any bugs that may be discovered over time in production.

    28. Re:So, what's the plan? by GuB-42 · · Score: 1

      I guess that by including a FPGA in their chips, they could completely get rid of the southbridge/PCH and connect all I/Os directly to the chip. As a result, motherboards will only need to take care about the electrical and physical connections and provide a program to the FPGA for the logic.

  3. Sure, it fits in with making high tech chips, but by Anonymous Coward · · Score: 0

    How will this extend Intel's market in the data center?

  4. Tricked by Anonymous Coward · · Score: 3, Funny

    Altera said "pay us $1000 this month, $2000 next month, and so on for 2 years, doubling each month." Intel thought it was a good deal and accepted before doing the math.

    1. Re:Tricked by Anonymous Coward · · Score: 2, Funny

      Oh they did the math.... on a Pentium 60.

    2. Re:Tricked by Anonymous Coward · · Score: 0

      If that were the case, the total would be closer to $32 billion: the 24th month's payment would be ~$16.7, but need to add up all the previous months.

    3. Re:Tricked by Anonymous Coward · · Score: 0

      Try again. The 1st month's payment is 1000*2^0, so the 24th month's payment is 1000*2^23.

  5. Takeover Takis by Impy+the+Impiuos+Imp · · Score: 1

    So another computer guy is getting fat on chips?

    --
    (-1: Post disagrees with my already-settled worldview) is not a valid mod option.
  6. Layoffs by Anonymous Coward · · Score: 1

    Expect layoffs after the merger. Cost cutting is almost always done after mergers. What kills me is that many of those engineers that will get canned will be considered damaged goods in today's job market: unemployed == doesn't have the skilz.

    So, if you are at Altera, start looking for another job ASAP before the mass layoffs happen. It happened to me and when all of us from the layoff hit the job market at once, it became very very difficult. And it was an interesting coincidence that most of us were senior level people.

    1. Re:Layoffs by Anonymous Coward · · Score: 0

      And expect layoffs from the Avago acquisition of Broadcom - I wonder if they'll close at similar times?

    2. Re:Layoffs by TwoEyedJack · · Score: 1

      Actually, I would only expect to see layoffs in areas like accounting and operations. The core engineering between a microprocessor and FPGA gates are quite different. The ecosystems are radically different, as are the customer bases. In fact, there is really not much synergy outside of using an FPGA as an accelerator in an enterprise-class server.

    3. Re:Layoffs by TooManyNames · · Score: 2
      The $750 million of "annual run rate synergies" and "track record of rapid deleveraging" should give you a sense of how much and how fast Avago will slice from Broadcom:

      http://investors.avagotech.com...

      In my experience, higher-ups for mergers like this aren't afraid to cut until it hurts, then hire back later (if absolutely necessary).

      --
      "Is not a sentence" is not a sentence. Well damn.
    4. Re:Layoffs by TheRaven64 · · Score: 1

      There's some overlap. Altera FPGAs have lots of fixed-function blocks on them, ranging from simple block RAMs to fast floating point units. There's a good chance that Intel could reuse some of their existing designs (which, after all, are already optimised for their manufacturing process) from things like AVX units and caches on x86 chips. A lot of the FPGAs also include things like PCIe, USB, Ethernet and so on controllers. Again, Intel makes these in their chipset division and, again, they're optimised for Intel's process so being able to stick them on FPGAs instead of the Altera ones would make sense.

      The main reason that you're probably right is that Intel is generally pretty bad at getting their own internal divisions to play nicely together, let alone ones that are used to being in a completely separate company.

      --
      I am TheRaven on Soylent News
  7. If penis size is so important by Anonymous Coward · · Score: 0

    Then why are there five billion Asians?

    1. Re:If penis size is so important by Anonymous Coward · · Score: 0

      Rape. Lots of it.

  8. Conflict of interest by erice · · Score: 1

    Altera has many customers who compete with Intel. They are not going to want to deal with Altera anymore. Instead of having Altera as a strong #2, Xilinx is going to own the FPGA business. Good for Xilinx, bad for everyone else.

    1. Re:Conflict of interest by Svartalf · · Score: 1

      Not a conflict of interest.  Just that a competitor just bought your supplier.  Big difference.  It's a problem that you need to find a new supplier.  The drawbacks with FPGAs is that there's nothing other than your sole supplier is just that.  You can't readily or easily swap out the FPGAs like you can SoC's in the ARM or MIPS space- or like RAM or eMMC's.  There's a bit of "standard" and "open" involved with things there.  I consider it necessary evil to be using them because they're not as open or "standardized" as the other stuff- but the moment someone wises up, even though it'll be a race to the bottom like the other plays, they will be the "king" there.

      --
      I am not merely a "consumer" or a "taxpayer". I am a Citizen of the State of Texas
  9. I don't think tentacles can impregnate anyone by Anonymous Coward · · Score: 0

    nt

    1. Re:I don't think tentacles can impregnate anyone by Anonymous Coward · · Score: 0

      Even a 1-incher can dribble out enough sperm that can make it to a uterus.

  10. Xilinx by Anonymous Coward · · Score: 0

    Time to look at the latest Xilinx offerings. I never liked Quartus anyhow. I stopped designing in Intel chips when they killed the XScale line. They became irrelevant to most embedded programmers. Many years after that management had tried to push the Intel ATOM on engineering saying that Intel said it was suitable for embedded systems. It really wasn't -- it was a PC on a chip.

    Given that my personal experience, I think that Intel (these days) is a "PC only" company I hope they keep their fingers off Altera. I expect my hopes to be dashed as early as next year. $10 says Nios 3 will be a slimmed down x86 subset.

    1. Re:Xilinx by Svartalf · · Score: 1

      Biggest problem THERE would be that they'd have to open up the X86 kimono a bit more than they'd really want to do that with NIOS.  I won't be surprised in one way (your meaning of the situation) if they do it and surprised all the same- because they're giving stuff out that can be more readily reverse engineered through the tools, etc. that people would get as a result of that decision.

      --
      I am not merely a "consumer" or a "taxpayer". I am a Citizen of the State of Texas
    2. Re:Xilinx by Anonymous Coward · · Score: 0

      they'd have to open up the X86 kimono a bit more than they'd really want to do

      Of course the NIOS could become a small wrapper around a "processing element block" in the FPGA. Actually given how Intel has been saying they want to go really multi-core for a while they could put a whole array of x86 "engines" on an FPGA and let you wire them up as you like.

      But I probably am just mad at Intel for nothing. They could just apply their process magic to Altera's existing line and make things better. But I'm Mr. Negative usually...

  11. Re:Sure, it fits in with making high tech chips, b by TheRaven64 · · Score: 1

    You might want to look at the papers from MS Research on their use of FPGAs in their data centres.

    --
    I am TheRaven on Soylent News
  12. Use FPGA to compress a swap file by tepples · · Score: 1

    Would an FPGA be viable as a lossless data compression coprocessor? That way, the computer could swap to a RAM disk and save space on whatever's currently paged out. It'd be like a hardware-accelerated version of zram (or Connectix RAM Doubler before that).

    1. Re:Use FPGA to compress a swap file by Anonymous Coward · · Score: 0

      Would an FPGA be viable as a lossless data compression coprocessor? That way, the computer could swap to a RAM disk and save space on whatever's currently paged out. It'd be like a hardware-accelerated version of zram (or Connectix RAM Doubler before that).

      To run at memory speed without hosing memory latency? On top of the efficiency overhead of being a FPGA? Forget about it.

    2. Re:Use FPGA to compress a swap file by tepples · · Score: 1

      The point of zram is to take the memory latency hit while continuing to run at far better than HDD speed. I was guessing that an FPGA would reduce the memory latency hit compared to gzipping each swapped-out page in software.

  13. Wow that didn't take long by Anonymous Coward · · Score: 0

    At first I misread the headline as "Intel To Buy Alberta For $16.7 Billion". My first thought was wow that didn't take long for the NDP to sell out ... and for so little. :)

    1. Re:Wow that didn't take long by Anonymous Coward · · Score: 0
  14. So 2^24 dollars? by aybiss · · Score: 1

    What was the exact amount?

    --
    It's OK Bender, there's no such thing as 2.
  15. Avago's past practices by Taco+Cowboy · · Score: 1

    Disclaimer: I'm one of the early investors of Avago

    As far as I know Avago does not carry out the "cut until it hurts" routine

    I know the style of Hock Tan, the CEO of Avago --- and from past experiences (from the merger with LSI, et al) the 'cut' were mainly of low level, ie, disposable personels, while key people - those who have been identified to have contributed in key technologies - were often offered plumb hike in salary / stock option to get them to continue to perform

    In other words, what Hock Tan looks for are:

    1. Talents
    2. Products
    3. Synergistic deployment of technology

    --
    Muchas Gracias, Señor Edward Snowden !
    1. Re:Avago's past practices by Anonymous Coward · · Score: 0

      Well that'll be a first, hopefully you are right.

  16. Intel, Altera, Xilinx and Free Software? by AndreyFilippov · · Score: 1

    We are using Xilinx FPGA for 13+years, when first choosing between Xilinx and Altera the decisive factor was the license terms - while both were proprietary, Xilinx zero-cost software had no expiration, while Altera's one had only 90 days. Our products are based of Free Software/Open Hardware (licensed under GPLv3 and CERN OHL) so it is critical for us to avoid expensive tools as our users would have to use them too just to be able to rebuild the executable image (bitstream in the case of the FPGA) from the source code provided with the products.

    Unfortunately Xilinx is gradually migrating away from openness and freedom, working with Zynq I noticed quiet a few undocumented hardware modules, even some primitives now can only be simulated using encrypted code (and so not compatible with free software simulators) - you may find my opinion on this issues in "FPGA is for Freedom" blog post.

    Intel is known to be more free software friendly. Do you think that such attitude will get to their new Altera FPGA department? Should we at Elphel already start migration to Altera/Intel?