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Scientists Turn Memory Chips Into Processors To Speed Up Computing Tasks (sciencedaily.com)
An anonymous reader quotes a report from Science Daily: A team of international scientists have found a way to make memory chips perform computing tasks, which is traditionally done by computer processors like those made by Intel and Qualcomm. This means data could now be processed in the same spot where it is stored, leading to much faster and thinner mobile devices and computers. This new computing circuit was developed by Nanyang Technological University, Singapore (NTU Singapore) in collaboration with Germany's RWTH Aachen University and Forschungszentrum Juelich, one of the largest interdisciplinary research centers in Europe. It is built using state-of-the-art memory chips known as Redox-based resistive switching random access memory (ReRAM). Developed by global chipmakers such as SanDisk and Panasonic, this type of chip is one of the fastest memory modules that will soon be available commercially. However, instead of storing information, NTU Assistant Professor Anupam Chattopadhyay in collaboration with Professor Rainer Waser from RWTH Aachen University and Dr Vikas Rana from Forschungszentrum Juelich showed how ReRAM can also be used to process data. This discovery was published recently in Scientific Reports. By making the memory chip perform computing tasks, space can be saved by eliminating the processor, leading to thinner, smaller and lighter electronics. The discovery could also lead to new design possibilities for consumer electronics and wearable technology.
like using truth tables in ROM as logic devices ?
Going by the press release, the new thing in the chips doesn't seem to be that they compute in the sense of doing addition or something, but rather that they store data using multiple levels of resistivity, so you could (eventually as tech improves) send / receive data using hex and dec digits, which the press release considers a kind of computation in the sense that it could eliminate radix conversions in some cases.
The tech is still kind of cool, but an enormous let-down compared to the hyped presentation.
Or we could make processors have memory to speed up memory access! Oh wait, we already do that.
Could you please tell me more about the process or are you purposelessly only telling me that it's been done so I clickbait myself into accessing a 3rd party website so I can find the answer myself while you pocket the referrer revenue?
-Cowardly Anonymous
Isn't that a "quaternary" number system?
Damn, should have saved by data books.
Interesting to compare this to Micron's Automata processor, which is using standard DRAM for computations, taking advantage of massive parallelism for specialized tasks involving unstructured data. But this application is for a specialized RAM which probably has less general use. https://www.micronautomata.com...
"He took a duck in the face at 250 knots." -- William Gibson, Pattern Recognition
Thin = fragile
Small = easily losable
Light = it'll be hours before you even realize you've lost it
Saves them enforcing planned obsolescence through OS upgrades, I guess.
But will it increase the size of my penis?
Maybe finally a way to run Windows 10 leaks! Good idea, using memory as the CPU. If leaks are there, we can run them! Yay!
Is this a discovery or an invention? Is it a case of making ReRAM do something it wasn't designed or expected to do, or has someone built a new thing that connects to/updates ReRAM?
systemd is Roko's Basilisk.
Unless I'm missing something, this won't result in "faster computing" but rather having more bandwidth for RAM.
Currently, all computer processors in the market are using the binary system, which is composed of two states – either 0 or 1. For example, the letter A will be processed and stored as 01000001, an 8-bit character.
However, the prototype ReRAM circuit built by Asst Prof Chattopadhyay and his collaborators processes data in four states instead of two. For example, it can store and process data as 0, 1, 2, or 3, known as Ternary number system.
Because ReRAM uses different electrical resistance to store information, it could be possible to store the data in an even higher number of states, hence speeding up computing tasks beyond current limitations.
If they wanted, they could already encode more data per bus line and put a translator by the RAM. However, literally none of this is talking about doing any computing using memory. It kinda seems like maybe a non-technical person wrote this press release.
Anons need not reply. Questions end with a question mark.
The 3 state RAM doesn't actually do computation.... if you want that... take a look at an old idea of mine...http://bitgrid.blogspot.com/
Can we get articles that don't attempt to explain what a processor is in order to drive their point?
A memory chip is not a processor.
The *summary of* the article didn't say what the article did.
Nothing the summary says is close to what is true.
NO MEMORY UNIT WILL PERFORM CPU FUNCTIONS at less than 2 orders of magnitude worse (that's 1/100 performance/power) today.
There's no "discovery" here. You can use stones and sticks to compute. Using a memory chip is far more advanced. And just as stupid.
Slow day on slashdot?
Yes. I signed this post. Because I'm in the industry. I'm not a troll. I get to call out when people put out stupid articles where they summarize stupid research papers that have nothing to do with reality land. Like this one.
E
Both the summary and the article don't know what they are talking about. Reading these will only confuse you.
Read the paper here instead : http://www.nature.com/articles...
To summarize :
- ReRAM is a promising type of non-volatile memory.
- Earlier, it was discovered that ReRAM cells could be used to perform computations. This is not news.
- Multi-level ReRAM, which is able to store more than 2 states per cell exist. This is similar to MLC/TLC for flash memory. This is not news.
- The new thing is that with using 6-state cells, they managed to do calculations in base 3 directly. More generally, they said it would be possible to do base-n using 2n-state cells. This is good because higher bases means less cells are required for the same computation.
Thank you for saying the things I was thinking.
Last post!
It really doesn't matter that the story is wrong or that what is true is not new. The problem is that BeauHD posted it. Someone picking stories to post on slashdot should understand the subject well enough to tell if the story is junk.
The concept of "Processor-in-Memory" (PIM) has been extensively researched in the high-performance computing community to avoid moving data to a distant processor for certain operations. Nothing came of it.
Over the decades, architectures have been introduced that included operations like increment and decrement in memory. These atomic operations were useful in building parallel computing constructs.
Resistive switching memory *is* memristance. https://en.wikipedia.org/wiki/... Leon Chua has been researching memristors for about half a century, and R. Stanley Williams has many article and lectures about how memristors can be used in place of NAND gates in CPUs (i.e. to perform computing tasks) as well as memory. I encourage everyone to use the right terminology when discussing and introducing memristors to a new audience, especially since they are being rediscovered at an increasing rate recently. R. Stanley Williams claims that it took a long time to collect a knowledge base of research papers and journal articles on the subject, because everyone was using a different phrase for "memristors".
But it turns out Steve Allen thought of it first. Bugger!
DRAM process has additional requirements in order to reliably create storage capacitors in the small size the process node can sustain. Microprocessors are best manufactured in logic-optimized processes. You usually sacrifice area if you implement logic on DRAM, and you risk much more if you try to implement DRAM on logic-optimized process.
If you produce a lot of junk because you tried to do something that a process flow is not reliably able to do, then your costs skyrocket and you may have been better off in mounting two different chips in a multi-chip module (MCM).
It's certainly interesting to make novel designs in a lab, but it can be difficult to produce large quantities cheaply if the process flow is not ideal for your design.
“Common sense is not so common.” — Voltaire
Certainly a DRAM-derivative chip will have literal assloads of space for LUTs. But it'll lack the other magic-sauce component of those other reprogrammable logic devices, FPGAs and CPLDs: routing. The result is typically a non-pipelined quasi-CPU with as big a machine state as there's dedicated RAM for it (somewhere around 40 bits at most, these days), on top of which a proper CPU gets written (using some other ginormous chunk of RAM).
And this ain't new, or difficult, or novel in any way.
What I wonder is how this stuff made it into an article about an up-and-coming DRAM-derivative memory technology.
There are reasons CPU and RAM are separated. These are good reasons. The whole article is unmitigated nonsense, except for a very small set of special-purpose computations that can already be done with FPGAs anyways.
Most ACs are not even worth the keystrokes to insult them. Be generically insulted by this and ignored otherwise.
Cray, of course:
https://en.wikipedia.org/wiki/Cray-3/SSS