I am aware of the difference between a PMOS and an NMOS device.
The symmetry that I refer to is not meant to imply that the NMOS and PMOS are symmetric, but instead meant to imply that the two cross-coupled inverters that make up each SRAM cell are the same. When power is applied to the cell, these two identical inverters fight against each other until stabilizing in either a 1-0 or 0-1 configuration.
I was contrasting this behavior against DRAM. In DRAM there is no fighting between such identical devices. Thus in DRAM, some influence (ie a temperature change) could cause all of the cells to change in the same way. In SRAM, such a change would have a similar common-mode impact on each of the two cross coupled inverters that make up each cell, and would thus be less likely to impact the initial state.
Data retention is a potential issue if the chip is not powered down for a sufficient period of time. In our work, data retention was not found to be a significant problem (ie no data remanence after cycling power off for half a second). We need to think about how to prevent/detect this at the system level.
SRAM retention can last a few seconds, as shown in "Low temperature data remanence in static RAM" by Skorobogatov at Cambridge.
However, we did see an interesting related phenomenon across a longer duration. If we store all 0s into an SRAM for a long time, and then turn off for ~20 seconds and turn back on, we see that the initial state contains more 1's than usual. This indicates a second type of remanence (likely caused by NBTI), showing as an anti-correlation.
DRAM should not work for our method, because the fingerprint in SRAM is due to the circuit symmetry of SRAM. Each of the states (0 and 1) is physically identical. The same is not true for DRAM.
As you suggest, it has been shown that state can be burned into SRAM (ie by Ross Anderson @ Cambridge). However, other work has shown that this is only a problem with older SRAM. Modern SRAM typically loses state within a second (ie by Skorobogatov @ Cambridge), although there is some temperature dependence to this.
In our experiments, the only longer term correlation seen was an anti-correlation between a given SRAM state and the SRAM state at the next initialization, due apparently to NBTI.
You are correct that SRAM can hold state through low voltages, our method requires a complete power down between successive fingerprints. SDRAM is a whole different story. Our methods apply only to SRAM, because SRAM has two symmetric states which compete at startup, leading to the fingerprint.
You are correct to suspect that the temperature has an effect on the fingerprints, but not by increasing the probability of a 1 as you suggest. Instead, temperature impacts how random the SRAM fingerprint is. In fact, the two states of an SRAM (1 and 0) are symmetric, so there is no reason that changing temperature should favor one state over the other.
Experiments performed since we published this paper have in fact confirmed that the amount of randomness (measured in terms of min-entropy) increases with higher temperatures (and decreases with lower temps), due to the fact that thermal noise (the source of randomness) is temperature dependent. This temperature dependence is used to support our claim that the source of the randomness is physically random thermal noise (and thus TRUEly random).
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I am aware of the difference between a PMOS and an NMOS device.
The symmetry that I refer to is not meant to imply that the NMOS and PMOS are symmetric, but instead meant to imply that the two cross-coupled inverters that make up each SRAM cell are the same. When power is applied to the cell, these two identical inverters fight against each other until stabilizing in either a 1-0 or 0-1 configuration.
I was contrasting this behavior against DRAM. In DRAM there is no fighting between such identical devices. Thus in DRAM, some influence (ie a temperature change) could cause all of the cells to change in the same way. In SRAM, such a change would have a similar common-mode impact on each of the two cross coupled inverters that make up each cell, and would thus be less likely to impact the initial state.
Data retention is a potential issue if the chip is not powered down for a sufficient period of time. In our work, data retention was not found to be a significant problem (ie no data remanence after cycling power off for half a second). We need to think about how to prevent/detect this at the system level.
SRAM retention can last a few seconds, as shown in "Low temperature data remanence in static RAM" by Skorobogatov at Cambridge.
However, we did see an interesting related phenomenon across a longer duration. If we store all 0s into an SRAM for a long time, and then turn off for ~20 seconds and turn back on, we see that the initial state contains more 1's than usual. This indicates a second type of remanence (likely caused by NBTI), showing as an anti-correlation.
DRAM should not work for our method, because the fingerprint in SRAM is due to the circuit symmetry of SRAM. Each of the states (0 and 1) is physically identical. The same is not true for DRAM.
As you suggest, it has been shown that state can be burned into SRAM (ie by Ross Anderson @ Cambridge). However, other work has shown that this is only a problem with older SRAM. Modern SRAM typically loses state within a second (ie by Skorobogatov @ Cambridge), although there is some temperature dependence to this.
In our experiments, the only longer term correlation seen was an anti-correlation between a given SRAM state and the SRAM state at the next initialization, due apparently to NBTI.
You are correct that SRAM can hold state through low voltages, our method requires a complete power down between successive fingerprints. SDRAM is a whole different story. Our methods apply only to SRAM, because SRAM has two symmetric states which compete at startup, leading to the fingerprint.
You are correct to suspect that the temperature has an effect on the fingerprints, but not by increasing the probability of a 1 as you suggest. Instead, temperature impacts how random the SRAM fingerprint is. In fact, the two states of an SRAM (1 and 0) are symmetric, so there is no reason that changing temperature should favor one state over the other.
Experiments performed since we published this paper have in fact confirmed that the amount of randomness (measured in terms of min-entropy) increases with higher temperatures (and decreases with lower temps), due to the fact that thermal noise (the source of randomness) is temperature dependent. This temperature dependence is used to support our claim that the source of the randomness is physically random thermal noise (and thus TRUEly random).
-dan