Unfortunately, the online version is restricted to IEEE members, but here's a quick synopsis:
Microwave researcher (J. R. Ashley) sees 1979 and 1988 Denver, CO and 1991 LA county studies linking HV power-distribution-induced magnetic fields with childhood leukemia. Thinks researchers are full of crap since there's essentially no correlation between wire distance/geometry ("wire codes") and magnetic fields.
Said researcher then sees 1992 Swedish study that shows 5x leukemia risk for kids living within 50 meters of HV power lines. This study apparently has a high number of cases and controls, and good statistical confidence.
Said researcher asks self, <emeril>"Self! Why this link between childhood leukemia and HV wire codes?"</emeril> Realizes that prior studies never looked at peak electric fields near study areas.
Said researcher goes to Denver, and measures peak E and H fields. Finds no correlation between distance and H field, but "fair" correlation between distance and E field. He then calculates peak current density on various regions on the body due to E and H fields, and finds that "current density induced in the ankles by the electric field is 2-10 times greater than the current density induced in the skin of the torso by the magnetic field, depending on distance from the supply substation."
So this guy recommends looking at peak E fields outside homes near HV power lines, and also looking at areas near lower-voltage (66kV to 230kV) lines that interconnect US substations. He also recommends trying to recreate E-field data from the Denver and LA studies using power company records.
Interesting stuff, and certainly not to be brushed off without a modicum of thought.
(BTW, you'll note that nowhere above do I say that HV lines cause cancer, merely that there's an interesting statistical link. Ashley is careful to do the same in his article, pointing out simply that we really don't know what, if any, causative process is going on -- we just don't have enough knowledge to answer the question yet.)
They are a fab leader however, but the fabs could be used to make anything
Not to nitpick or anything, but I think it'd be more accurate to say that Intel is a fab capacity leader, not necessarily a fab technology leader. I think it's safe to say that IBM has a comfortable lead in CMOS fab technology for now.
Why SOI? The gate of a MOS transistor is essentially a capacitor, and the speed at which it can operate is determined by how long this capacitor takes to charge/discharge. Basic physics will tell you that the thicker the capacitor, the smaller its value, and the faster the transistor. By putting the transitor on an SOI wafer, the silicon-dioxide layer acts as extra thickness for the capacitor, reducing its value, and making the thing faster.
Erm, not exactly.
You're right that gate capacitance is important, but what's really affected by the insulator layer are two different things:
junction capacitance - This is the capacitance of the source and drain, and it's formed by the parasitic PN juntion at the boundary between the source/drain and the bulk silicon. It includes both a sidewall component (formed by the vertical boundary between the source/drain and the bulk) and an area component (formed by the horizontal s/d-bulk boundary at the bottom of the source/drain). This latter component is eliminated in SOI, because there's no bulk silicon under the device.
body effect - A posistive voltage difference between the source and the bulk causes the effective threshold voltage to rise, which means the transistor is harder to turn on. Since there isn't any bulk below the channel, there isn't a mechanism for the bulk bias to affect the threshold voltage. This is especially important when you have stacks of transistors, e.g. in the pulldown path of a NAND gate.
Slashdot Mirror
Check this out. (Scroll down to the middle of the "PC Processors" session.)
Pretty interesting for us PPC-heads....
Here's a better (i.e. working) link for the Apple Cinema Display.
Um, not quite. It's actually a radial coordinate system, with a diametric resolution of 768 pixels. Check out this link for more info.
Imagine if we all had 3D printers that could pretty much make any plastic object we wanted.
You mean like this?
2. They were early complete adopters of both firewire and USB.
Not to pick a nit, but I think you meant "inventors of firewire".
They just saw some reporter claiming an small, unsupported study found an extremely weak link between power lines and some disease.
I think you should take a look at the most recent issue of IEEE Spectrum magazine. The "Speakout" section for July 2000 contains an article on exactly this subject.
Unfortunately, the online version is restricted to IEEE members, but here's a quick synopsis:
So this guy recommends looking at peak E fields outside homes near HV power lines, and also looking at areas near lower-voltage (66kV to 230kV) lines that interconnect US substations. He also recommends trying to recreate E-field data from the Denver and LA studies using power company records.
Interesting stuff, and certainly not to be brushed off without a modicum of thought.
(BTW, you'll note that nowhere above do I say that HV lines cause cancer, merely that there's an interesting statistical link. Ashley is careful to do the same in his article, pointing out simply that we really don't know what, if any, causative process is going on -- we just don't have enough knowledge to answer the question yet.)
They are a fab leader however, but the fabs could be used to make anything
Not to nitpick or anything, but I think it'd be more accurate to say that Intel is a fab capacity leader, not necessarily a fab technology leader. I think it's safe to say that IBM has a comfortable lead in CMOS fab technology for now.
The gate of a MOS transistor is essentially a capacitor, and the speed at which it can operate is determined by how long this capacitor takes to charge/discharge.
Basic physics will tell you that the thicker the capacitor, the smaller its value, and the faster the transistor. By putting the transitor on an SOI wafer, the silicon-dioxide layer acts as extra thickness for the capacitor, reducing its value, and making the thing faster.
Erm, not exactly.
You're right that gate capacitance is important, but what's really affected by the insulator layer are two different things:
There's more on this at IBM's web site.