There's been a good deal of reserach on this under the topic of wave-pipelined systems. The biggest problems are in the area of design tools, e.g. accurate timing checks and debugging methods. On the flip-side in 1993, a 32-bit wave-pipelined multiplier was by by a grad student at NC State running at 200-MHz in 2.0 micron CMOS.
Definitely agree, I had Brooks for Advanced Computer Architecture. He gave you a real feel for why certain bottlenecks in Computer Architectures exist and how to find them. Another First for Brooks from what I understand was he started the first Computer Science Program, prior to that point Comp-Sci was taught primarily in Math Departments.
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There's been a good deal of reserach on this under the topic of wave-pipelined systems. The biggest problems are in the area of design tools, e.g. accurate timing checks and debugging methods. On the flip-side in 1993, a 32-bit wave-pipelined multiplier was by by a grad student at NC State running at 200-MHz in 2.0 micron CMOS.
Definitely agree, I had Brooks for Advanced Computer Architecture. He gave you a real feel for why certain bottlenecks in Computer Architectures exist and how to find them. Another First for Brooks from what I understand was he started the first Computer Science Program, prior to that point Comp-Sci was taught primarily in Math Departments.