The chip has a quite capable A/D. And why spend $18 for an 8 bit system? Granted, I could go get an Atmel CPU (and I have) but this a 32-bit processor running at 48MHz is going to be more capable. Not sure where you got the idea there is no A/D.
1) Yes you can. The DDJ articles have a link to a tool that will package them for market and has the two examples on the market.
2) Granted.
3) Granted.
I am all for the government helping "pave the road to space" like they helped the transcontinental railroad (which was a success in its day). BUT, the two things that bother me is that Constellation has already made a sizable investment that will be lost (just like the investment in the original station) AND it is going to decimate many, many high tech jobs. I am all for transition to private industry but to just fire literally thousands of scientists and engineers. They want to make jobs, not destroy them but I hear estimates of over 5,000 jobs in Houston alone and probably more than that in Huntsville.
NASA and its contractors do a TERRIBLE job of promoting success and good work to the public. Instead all you hear is bad news. The press helped when it was fun but they've left. Don't believe me? How many of you can draw a reasonably accurate diagram of Apollo? Now how many of you can sketch a reasonably accurate floor plan for ISS? How many modules are in it? Does it have one truss, two, or none?
I was bummed out when the giant company I work for did NOT win the constellation business we wanted. But NASA and its contractors do a TERRIBLE job of promoting success and good work to the public. Instead all you hear is bad news. The press helped when it was fun but they've left. Don't believe me? How many of you can draw a reasonably accurate diagram of Apollo? Now how many of you can sketch a reasonably accurate floor plan for ISS? How many modules are in it? Does it have one truss, two, or none?
I disagree. I think a lot of engineering is like traditional brick and mortar architecture. Yes, there are certain rules you have to follow. A certain wall can hold a certain load, etc. But beyond that there is a creativity. So to stretch the architecture analogy, I can "follow the rules" and make cinder block structures that are perfectly functional. But people won't want to live in them. I might want a block of flats or an abattoir (nudge, nudge) but there is still creativity to be exercised within the broad structure.
I wouldn't limit this to just software engineering. We've all switched from one functional piece of software to another because we liked it better. How it looks, how it works, etc. Same for cell phones, universal remotes, and TV recorders. My cable box from Comcast and my TiVO do the same basic functions. But the Scientific Atlanta/Motorola cable box is a prison wing and the TiVo is more like Frank Lloyd Wright's Fallingwater.
I can't speak to HOW either system was developed (as far as things like XP and Agile which I would not characterize as legitimizing laziness, but that's another post). But I can tell you that the end results are a synthesis of engineering and art. And while my non-techie wife doesn't know a lot about our "art", even she knows what she likes when looking at the cable box vs TiVo.
The fact that we don't allow for the "art" part in most modern design methodologies is probably part of our society's recent fascination with the idea that everyone is exactly equal in all things. They aren't. Some people are simply better at some things than other people. I code better than my ex-son in law. He fixes cars better than I do (which is a pretty low bar). The fallacy is to think that if I just do everything he does I can fix cars like he does and if he does everything I do he can code as well as I can. In fact, no matter how you try to reproduce the true expert's process, you will fail unless it is something extremely physical and repeatable (say... soldering).
Good example. I used to take apart bad ICs and figure out why they were bad. I also used to teach that same skill to people from all over the place. Certain cultures had a real problem removing the glass passivation off the IC. To do this you (after exposing the die) soak the part in HF acid for, say, 1 minute. Then you wash it off with DI water, blow it dry, and go look at it under a microscope. Where the wires connect to the die the glass is cut. If you can still see the edge of the glass in the microscope then you didn't get all the glass off so you go soak it for 15 or 30 more seconds and try again. You might get it the first time or the 5th time. It depends on how thick the glass is, the temperature, how depleted the etchant is, etc. Some cultures had no problem with this procedure. Some people from certain cultures, however, wanted to write down: Put it in for 1 minute. Remove it, rinse, dry. Then put it back in for 30 seconds. Well maybe you do and maybe you don't. Every time will be different and every time will require judgment. "Art" if you will.
Our processes need to reflect the art part of the work. Not just in software engineering but in all forms of engineering. I think, too, that we confuse ourselves with lumping too many kinds of software into one thing. I don't expect my auto mechanic to fix jet engines. But we -- especially managers -- seem to think that if you can write a payroll app you ought to be able to write digital signal processing code or vice versa. But that's another rant for another time.
There's no comparison. All science fiction is a mirror on the time it was written. Imagine writing a SciFi novel in 1890 where the characters worry about what cell phone plan to use and if they should have cable or DSL for twitter and hulu. No one would understand it. So all these future people (and blue aliens on Avatar) are really humans of their author's time.
Star Trek has the disadvantage of spanning 30+ years. So Kirk was the prototypical 60's guy. Kick a**, take names, and get it done. I realized this on one of the very early STNG episodes. I think it is the one where they meet the Ferengi (or however you spell it) the first time. Situation: There is an unknown enemy craft in a hostile position hovering off the starboard bow. What does Picard do? What any 90's guy would do. He calls a meeting. No kidding. "Everyone to the reaaadddy room" (hard to type an accent). The second string takes up the bridge and they hold and honest to goodness corporate style meeting that Dilbert would have been at home in.
Of course, I'm a Kirk fan but I'm also a child of the 60s and don't have much patience for meetings (current day job notwithstanding).
Given this was in the embedded portion of Dr. Dobb's I don't think anyone in that audience cares about x86 compatibility. PICs, AVRs, and ARMs won't run a line of x86 code but are quite popular. In the FPGA space, ARM and PPC are both well represented. Ditto for speed. A 32 bit CPU at 10MIPs is handling 40 megabytes per second (and that's not the maximum speed for One-Der). A PIC running at 5MIPS (20MHz clock) is handling 5 megabytes per second.
Even in the "PC" space. I have an Arm-based processor that runs Linux, gcc, and just about any piece of code I want. If we could ever get a mass market CPU that DIDN'T have to maintain a 23 year old instruction set so it can boot MSDOS we could really get some inexpensive horsepower.
As for the original comment, lose on performance is unsubstantiated. With the correct functional units for a particular task, a processor like this can blow the doors off of a generic CPU. Code density. Sure. But its an engineering trade. Do I make my datapath more complex or do I spend on memory? There's not one right answer for that (or most design trades, for that matter). In some applications, I'd rather simplify my datapath and add custom instructions with ease and buying a few memory chips isn't killing me. In some cases, though, I agree you'd want to trade the other way and work harder to conserve memory. Of course, there's opcode compression (a la VLSI) etc.
Each CPU I've ever designed has been different and that's because they were built for different purposes. The idea that one CPU architecture, or one programming language, or one brand of computer, or one operating system is The One True Way is fanboy religion and I've never really got that. Well, other than emacs vs vi. That's a worthy argument I can be baited into.
Of course it has multiple operations. But in fact it has a single instruction. The CPU's control unit treats every instruction the same. Now if you want to nit pick, yes the immediate load format makes it really a 2 or 3 instruction machine. But your argument is confusing operation with instruction.
Think of an analogy of a C program. If I write:
void foo(int cmd) {
switch (cmd) {
case 0:// do zero stuff
break;
. . .
Do I have one subroutine or many? I have one subroutine. The fact that it carries out multiple operations is not relevant to the count of the subroutines even though I could certainly write "n" subroutines foo0, foo1, foo2, etc.
Well I don't think switching between ARM and Thumb mode counts ad variable size instructions in the purest sense. However, the newer ARMs have Thumb-2 which has nearly the entire ARM instruction set (and some new things) in Thumb mode and has some 32 bit instructions along with the traditional 16 bit Thumb instruction. Not only do some of the newer ARMs support this, some like the Cortex-M3 apparently ONLY support this and ARM clearly wants this to be the "default" mode going forward.
My only complaint is they had ARM and THUMB. Then they went to THUMB2. I would have named it MIDDLE-FINGER.
I think the fact that extensions appear on the Mozilla add on site could give some users the impression that they are "trusted" in some way. By default, FF won't install except from there (and maybe one or two other sites). But as far as I know, there's no real check. I mean I'm sure if you put up a extension that wiped your hard drive, enough people would complain and comment that it would get yanked. But something more subtle, maybe not.
But that does in fact reduce complexity when you go to add new "instructions". Suppose you want to add a multiplier. You simply build a module that does multiply, verify it, and then hang it off the bus. Same goes for if you want, say, a second stack (for the Forth compiler, for example). You just make a new instance of the stack FU.
It is very difficult to add instructions to microblaze. Beyond that, it would be even harder to have a compiler reconfigure the ISA of microblaze on the fly.
This guy has not invented an instruction set. He has invented a microcode engine. In doing so, he's muddied the notion of processor state, so
Actually, there is a newer version that handles interrupts (required a very small set of changes in the core and all the interrupt hardware is in the FIO block except debugging interrupts which are in a new FDEBUG block). Saving the processor state is no worse than saving the things you use on the stack just like any other processor.
There's more on this newer version at:
http://www.awce.com/classroom/course/view.php?id=11
I agree -- I put my Mom on Linux this year (yeah yeah, what a cliche). And she often says "Oh, I can't print my pictures 4x6 like I did in Windows" -- um, try Picasa. Or "Oh my printer doesn't tell me what ink cart is low" -- um run hp-toolbox. So having as much stuff clearly labeled is good. Maybe have a "novice" mode that shows you programs you haven't run with a difficulty rating;-0
At least you can install what you want.
Now if I could only find her a good "card" program like PrintMaster for Linux. Scribus seems a bit much for her.
Actually the bus interface is a tristate buffer and a decoder. Not free, but cheap especially on modern fabric. As for CISC thinking, the RISC text is emphasizing the one instruction not that the actual "derived" ISA is RISC-like.
The advantage to this is you can plug in different FUs (or CPs if you rather) without mucking with the processor per se.
The machine directly addresses registers and functional units. The register bank had an indirect register much like a PIC's FSR register scheme. All memory access is via functional units. So you can design what memory addressing modes you want. The default machine has two memory access blocks. One has two pointers that can pre or post incremented by a constant (or not) and indexed. The other block implements a stack and can access off fixed offsets of the stack as well.
But the memory FUs could be arbitrarily complex implementing an MMU, segmented memory, block transfers, and any addressing mode you might require. If you did, for example, an MMU and kept the same interface as the memory FU (perhaps adding a second FU to control the page tables) the change would be transparent to application code.
Actually, a few points:
1) Yes it is an old idea. The article points out a few links to MOVE, MAXQ, and Wikipedia about it.
2) The assembler is there that does macro like CALL, PUSH, etc. Its actually an interesting piece in of itself since it converts assembly to C macros and then uses gcc to drive the output.
3) The board has a 1M gate FPGA but the CPU doesn't use anywhere near all of it, but you can't get an FPGA with exactly the gate count you need (gate count is deceptive anyway). And much of what it does use is for onboard "block RAM" to make it a SOC. Go with external memory for program and data and the gate count drops sharply. Oh and Novix was a 16 bit CPU with no onboard memory, so that's kind of an apple and orange comparison. You can reduce the gate count by dropping unused FUs too.
The CPU as presented actually does shifting and a host of other operations in one cycle. The DDJ version does not do hardware multiply or divide but it is easy to add that or any other operation you might want.
I'm missing the comment about "first operand is the task". If you read the article the instruction format is simply {condition} source -> destination. So, what does that mean first operand is the task?
The idea is NOT new -- the article leads off mentioning that. As for the universal logic elements, that's what the FPGA is.
I think a lot of poster have kind of missed the point. There are at least 3 pretty useful things to do with the CPU presented:
1) Build a CPU with custom instructions without having to become an expert on designing CPUs.
2) Learning a lot about coding in Verilog and doing significant hardware designs.
3) As the article talks about at the end, there are lots of applications for this as a base for reconfigurable computing. You compiler looks at your source code, figures out what functional units you need, creates the processor Verilog, and then compiles the code to run on that ISA.
Oh, there is a video of the Linux-based simulator running a monitor and a test program at: http://www.youtube.com/watch?v=KnQGcoe6oGg
Actually it does have 63 registers and can easily have more. It is easy to add multiplication to the functional units in several ways including using the multiplier in the FPGA fabric. And actually it is faster than a lot of embedded CPUs, especially if you factor in the bit width. Now if you think you are going to match a Pentium IV on a Spartan 3 FPGA... well... yeah you are going to be disappointed.
Also the whole point to this was the architecture of the CPU not specific features. And its meant for embedded use. So comparing it in any way to a desktop CPU and/or complaining it doesn't do _____ is sorta missing the point.
You mean multithreading at the software level? As it appears in DDJ the CPU has no interrupts so threads would have to be cooperative. But there is a later version with interrupts that can support threading and tasking. I don't doubt you could set up an atomic (test and set) operation as is, but if you couldn't you could always add it as a functional unit as a "new instruction."
Yep, the assembler lets you write things like CALL, JMP, PUSH, etc. The Maxim MAXQ does this too. It doesn't even expose its MOVE architecture. Its all hidden behind the assembler.
Slashdot Mirror
The chip has a quite capable A/D. And why spend $18 for an 8 bit system? Granted, I could go get an Atmel CPU (and I have) but this a 32-bit processor running at 48MHz is going to be more capable. Not sure where you got the idea there is no A/D.
1) Yes you can. The DDJ articles have a link to a tool that will package them for market and has the two examples on the market. 2) Granted. 3) Granted.
I am all for the government helping "pave the road to space" like they helped the transcontinental railroad (which was a success in its day). BUT, the two things that bother me is that Constellation has already made a sizable investment that will be lost (just like the investment in the original station) AND it is going to decimate many, many high tech jobs. I am all for transition to private industry but to just fire literally thousands of scientists and engineers. They want to make jobs, not destroy them but I hear estimates of over 5,000 jobs in Houston alone and probably more than that in Huntsville.
NASA and its contractors do a TERRIBLE job of promoting success and good work to the public. Instead all you hear is bad news. The press helped when it was fun but they've left. Don't believe me? How many of you can draw a reasonably accurate diagram of Apollo? Now how many of you can sketch a reasonably accurate floor plan for ISS? How many modules are in it? Does it have one truss, two, or none?
If you want to see what they have REALLY been up to: http://www.youtube.com/watch?v=a2IQVZmHnJQ
I was bummed out when the giant company I work for did NOT win the constellation business we wanted. But NASA and its contractors do a TERRIBLE job of promoting success and good work to the public. Instead all you hear is bad news. The press helped when it was fun but they've left. Don't believe me? How many of you can draw a reasonably accurate diagram of Apollo? Now how many of you can sketch a reasonably accurate floor plan for ISS? How many modules are in it? Does it have one truss, two, or none?
If you want to see what they have REALLY been up to: http://www.youtube.com/watch?v=a2IQVZmHnJQ
I wouldn't limit this to just software engineering. We've all switched from one functional piece of software to another because we liked it better. How it looks, how it works, etc. Same for cell phones, universal remotes, and TV recorders. My cable box from Comcast and my TiVO do the same basic functions. But the Scientific Atlanta/Motorola cable box is a prison wing and the TiVo is more like Frank Lloyd Wright's Fallingwater.
I can't speak to HOW either system was developed (as far as things like XP and Agile which I would not characterize as legitimizing laziness, but that's another post). But I can tell you that the end results are a synthesis of engineering and art. And while my non-techie wife doesn't know a lot about our "art", even she knows what she likes when looking at the cable box vs TiVo.
The fact that we don't allow for the "art" part in most modern design methodologies is probably part of our society's recent fascination with the idea that everyone is exactly equal in all things. They aren't. Some people are simply better at some things than other people. I code better than my ex-son in law. He fixes cars better than I do (which is a pretty low bar). The fallacy is to think that if I just do everything he does I can fix cars like he does and if he does everything I do he can code as well as I can. In fact, no matter how you try to reproduce the true expert's process, you will fail unless it is something extremely physical and repeatable (say... soldering).
Good example. I used to take apart bad ICs and figure out why they were bad. I also used to teach that same skill to people from all over the place. Certain cultures had a real problem removing the glass passivation off the IC. To do this you (after exposing the die) soak the part in HF acid for, say, 1 minute. Then you wash it off with DI water, blow it dry, and go look at it under a microscope. Where the wires connect to the die the glass is cut. If you can still see the edge of the glass in the microscope then you didn't get all the glass off so you go soak it for 15 or 30 more seconds and try again. You might get it the first time or the 5th time. It depends on how thick the glass is, the temperature, how depleted the etchant is, etc. Some cultures had no problem with this procedure. Some people from certain cultures, however, wanted to write down: Put it in for 1 minute. Remove it, rinse, dry. Then put it back in for 30 seconds. Well maybe you do and maybe you don't. Every time will be different and every time will require judgment. "Art" if you will.
Our processes need to reflect the art part of the work. Not just in software engineering but in all forms of engineering. I think, too, that we confuse ourselves with lumping too many kinds of software into one thing. I don't expect my auto mechanic to fix jet engines. But we -- especially managers -- seem to think that if you can write a payroll app you ought to be able to write digital signal processing code or vice versa. But that's another rant for another time.
There's no comparison. All science fiction is a mirror on the time it was written. Imagine writing a SciFi novel in 1890 where the characters worry about what cell phone plan to use and if they should have cable or DSL for twitter and hulu. No one would understand it. So all these future people (and blue aliens on Avatar) are really humans of their author's time. Star Trek has the disadvantage of spanning 30+ years. So Kirk was the prototypical 60's guy. Kick a**, take names, and get it done. I realized this on one of the very early STNG episodes. I think it is the one where they meet the Ferengi (or however you spell it) the first time. Situation: There is an unknown enemy craft in a hostile position hovering off the starboard bow. What does Picard do? What any 90's guy would do. He calls a meeting. No kidding. "Everyone to the reaaadddy room" (hard to type an accent). The second string takes up the bridge and they hold and honest to goodness corporate style meeting that Dilbert would have been at home in. Of course, I'm a Kirk fan but I'm also a child of the 60s and don't have much patience for meetings (current day job notwithstanding).
My mom never says WTF. Well. Almost never.
Given this was in the embedded portion of Dr. Dobb's I don't think anyone in that audience cares about x86 compatibility. PICs, AVRs, and ARMs won't run a line of x86 code but are quite popular. In the FPGA space, ARM and PPC are both well represented. Ditto for speed. A 32 bit CPU at 10MIPs is handling 40 megabytes per second (and that's not the maximum speed for One-Der). A PIC running at 5MIPS (20MHz clock) is handling 5 megabytes per second.
Even in the "PC" space. I have an Arm-based processor that runs Linux, gcc, and just about any piece of code I want. If we could ever get a mass market CPU that DIDN'T have to maintain a 23 year old instruction set so it can boot MSDOS we could really get some inexpensive horsepower.
As for the original comment, lose on performance is unsubstantiated. With the correct functional units for a particular task, a processor like this can blow the doors off of a generic CPU. Code density. Sure. But its an engineering trade. Do I make my datapath more complex or do I spend on memory? There's not one right answer for that (or most design trades, for that matter). In some applications, I'd rather simplify my datapath and add custom instructions with ease and buying a few memory chips isn't killing me. In some cases, though, I agree you'd want to trade the other way and work harder to conserve memory. Of course, there's opcode compression (a la VLSI) etc.
Each CPU I've ever designed has been different and that's because they were built for different purposes. The idea that one CPU architecture, or one programming language, or one brand of computer, or one operating system is The One True Way is fanboy religion and I've never really got that. Well, other than emacs vs vi. That's a worthy argument I can be baited into.
http://www.youtube.com/watch?v=YYdpRV29_Y8 - Actual 2nd gen hardware
http://www.youtube.com/watch?v=KnQGcoe6oGg - Software simulator
Of course it has multiple operations. But in fact it has a single instruction. The CPU's control unit treats every instruction the same. Now if you want to nit pick, yes the immediate load format makes it really a 2 or 3 instruction machine. But your argument is confusing operation with instruction. // do zero stuff
Think of an analogy of a C program. If I write:
void foo(int cmd) {
switch (cmd) {
case 0:
break;
. . .
Do I have one subroutine or many? I have one subroutine. The fact that it carries out multiple operations is not relevant to the count of the subroutines even though I could certainly write "n" subroutines foo0, foo1, foo2, etc.
Apparently RMS and Linus are both too violent to get the peace award: http://xkcd.com/225/
Well I don't think switching between ARM and Thumb mode counts ad variable size instructions in the purest sense. However, the newer ARMs have Thumb-2 which has nearly the entire ARM instruction set (and some new things) in Thumb mode and has some 32 bit instructions along with the traditional 16 bit Thumb instruction. Not only do some of the newer ARMs support this, some like the Cortex-M3 apparently ONLY support this and ARM clearly wants this to be the "default" mode going forward. My only complaint is they had ARM and THUMB. Then they went to THUMB2. I would have named it MIDDLE-FINGER.
I think the fact that extensions appear on the Mozilla add on site could give some users the impression that they are "trusted" in some way. By default, FF won't install except from there (and maybe one or two other sites). But as far as I know, there's no real check. I mean I'm sure if you put up a extension that wiped your hard drive, enough people would complain and comment that it would get yanked. But something more subtle, maybe not.
But that does in fact reduce complexity when you go to add new "instructions". Suppose you want to add a multiplier. You simply build a module that does multiply, verify it, and then hang it off the bus. Same goes for if you want, say, a second stack (for the Forth compiler, for example). You just make a new instance of the stack FU.
It is very difficult to add instructions to microblaze. Beyond that, it would be even harder to have a compiler reconfigure the ISA of microblaze on the fly.
This guy has not invented an instruction set. He has invented a microcode engine. In doing so, he's muddied the notion of processor state, so
Actually, there is a newer version that handles interrupts (required a very small set of changes in the core and all the interrupt hardware is in the FIO block except debugging interrupts which are in a new FDEBUG block). Saving the processor state is no worse than saving the things you use on the stack just like any other processor. There's more on this newer version at: http://www.awce.com/classroom/course/view.php?id=11
I agree -- I put my Mom on Linux this year (yeah yeah, what a cliche). And she often says "Oh, I can't print my pictures 4x6 like I did in Windows" -- um, try Picasa. Or "Oh my printer doesn't tell me what ink cart is low" -- um run hp-toolbox. So having as much stuff clearly labeled is good. Maybe have a "novice" mode that shows you programs you haven't run with a difficulty rating ;-0
At least you can install what you want.
Now if I could only find her a good "card" program like PrintMaster for Linux. Scribus seems a bit much for her.
Actually the bus interface is a tristate buffer and a decoder. Not free, but cheap especially on modern fabric. As for CISC thinking, the RISC text is emphasizing the one instruction not that the actual "derived" ISA is RISC-like. The advantage to this is you can plug in different FUs (or CPs if you rather) without mucking with the processor per se.
The machine directly addresses registers and functional units. The register bank had an indirect register much like a PIC's FSR register scheme. All memory access is via functional units. So you can design what memory addressing modes you want. The default machine has two memory access blocks. One has two pointers that can pre or post incremented by a constant (or not) and indexed. The other block implements a stack and can access off fixed offsets of the stack as well. But the memory FUs could be arbitrarily complex implementing an MMU, segmented memory, block transfers, and any addressing mode you might require. If you did, for example, an MMU and kept the same interface as the memory FU (perhaps adding a second FU to control the page tables) the change would be transparent to application code.
I thought it was: Anonymous Coward is not in the sudoers file. This incident will be reported. ;-)
Actually, a few points: 1) Yes it is an old idea. The article points out a few links to MOVE, MAXQ, and Wikipedia about it. 2) The assembler is there that does macro like CALL, PUSH, etc. Its actually an interesting piece in of itself since it converts assembly to C macros and then uses gcc to drive the output. 3) The board has a 1M gate FPGA but the CPU doesn't use anywhere near all of it, but you can't get an FPGA with exactly the gate count you need (gate count is deceptive anyway). And much of what it does use is for onboard "block RAM" to make it a SOC. Go with external memory for program and data and the gate count drops sharply. Oh and Novix was a 16 bit CPU with no onboard memory, so that's kind of an apple and orange comparison. You can reduce the gate count by dropping unused FUs too. The CPU as presented actually does shifting and a host of other operations in one cycle. The DDJ version does not do hardware multiply or divide but it is easy to add that or any other operation you might want.
I'm missing the comment about "first operand is the task". If you read the article the instruction format is simply {condition} source -> destination. So, what does that mean first operand is the task? The idea is NOT new -- the article leads off mentioning that. As for the universal logic elements, that's what the FPGA is. I think a lot of poster have kind of missed the point. There are at least 3 pretty useful things to do with the CPU presented: 1) Build a CPU with custom instructions without having to become an expert on designing CPUs. 2) Learning a lot about coding in Verilog and doing significant hardware designs. 3) As the article talks about at the end, there are lots of applications for this as a base for reconfigurable computing. You compiler looks at your source code, figures out what functional units you need, creates the processor Verilog, and then compiles the code to run on that ISA. Oh, there is a video of the Linux-based simulator running a monitor and a test program at: http://www.youtube.com/watch?v=KnQGcoe6oGg
Actually it does have 63 registers and can easily have more. It is easy to add multiplication to the functional units in several ways including using the multiplier in the FPGA fabric. And actually it is faster than a lot of embedded CPUs, especially if you factor in the bit width. Now if you think you are going to match a Pentium IV on a Spartan 3 FPGA... well... yeah you are going to be disappointed. Also the whole point to this was the architecture of the CPU not specific features. And its meant for embedded use. So comparing it in any way to a desktop CPU and/or complaining it doesn't do _____ is sorta missing the point.
You mean multithreading at the software level? As it appears in DDJ the CPU has no interrupts so threads would have to be cooperative. But there is a later version with interrupts that can support threading and tasking. I don't doubt you could set up an atomic (test and set) operation as is, but if you couldn't you could always add it as a functional unit as a "new instruction."
Yep, the assembler lets you write things like CALL, JMP, PUSH, etc. The Maxim MAXQ does this too. It doesn't even expose its MOVE architecture. Its all hidden behind the assembler.