re: 4mb vs 2mb L2. but the sparc cache doesn't run at processor clock, and it's not on chip. So the sparc engine a factor of 4 less capable. And it shows up in the benchmarks, mostly processor but even system level stuff (especially when you compare "same sized" systems - cpus, memory, IO).
The E10K is a neat machine w/ 64 processors and 10gbytes/s of memory bandwidth, but this is only 200mbytes/s of memory bandwidth per processor when fully populated. Check out the IBM S80 (40gbytes/s across 24 processors, better than 1.6 gbytes/s per processor). The Intel profusion chipset & memory subsystem delivers about 800 mbytes/s per processor.
Also, the recent IDC numbers imply that the intel-based 8 ways are outselling all others' 8ways (combined). And if you believe the single box tpc/c (www.tpc.org) numbers, these 8ways are more capable database and application boxes than the largest SMPs that existed 3-4 years ago.
I don't think we're in Kansas anymore, Toto. Folks must be using these boxes for something more than file and print:-)
I also think it is funny that people give Intel grief about their chip schedules, but Sun started talking about their Sparc3 in 1995 when they saw that the ppro 200 with it's at speed cache smoked everything except the alpha on business codes (integer performance). Here it is 5 years later.. Reminds me of the early 90s when Sun had the same problems getting a competitive sparc2 out the door. But it's not their fault, they depend on others for their chip technology.
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re: 4mb vs 2mb L2. but the sparc cache doesn't run at processor clock, and it's not on chip. So the sparc engine a factor of 4 less capable. And it shows up in the benchmarks, mostly processor but even system level stuff (especially when you compare "same sized" systems - cpus, memory, IO).
:-)
The E10K is a neat machine w/ 64 processors and 10gbytes/s of memory bandwidth, but this is only 200mbytes/s of memory bandwidth per processor when fully populated. Check out the IBM S80 (40gbytes/s across 24 processors, better than 1.6 gbytes/s per processor). The Intel profusion chipset & memory subsystem delivers about 800 mbytes/s per processor.
Also, the recent IDC numbers imply that the intel-based 8 ways are outselling all others' 8ways (combined). And if you believe the single box tpc/c (www.tpc.org) numbers, these 8ways are more capable database and application boxes than the largest SMPs that existed 3-4 years ago.
I don't think we're in Kansas anymore, Toto. Folks must be using these boxes for something more than file and print
I also think it is funny that people give Intel grief about their chip schedules, but Sun started talking about their Sparc3 in 1995 when they saw that the ppro 200 with it's at speed cache smoked everything except the alpha on business codes (integer performance). Here it is 5 years later.. Reminds me of the early 90s when Sun had the same problems getting a competitive sparc2 out the door. But it's not their fault, they depend on others for their chip technology.
Ari