Reading the comments,
YES...Fujitsu in the early to mid 90's were building ASIC's or FPGA on about a 18us substrate with more gates then the pentium 60 or 66 at the time with a lot higher clock speed. These were developed for prototyping DSP's (mobile phones' for the GSM standard to be releasd), MPEG's , soundcards , Graphics cards,at Uni on a electronic systems engineering course build chips from sand and designing OS, asked if they could be extended to a fully EE Programmable standard as at the time they were PROM only in usage. They did not see why not with a couple of these in a PCI card or you could design anything from dedicated Windows acceleators to console game emulators (ie PS2 anyone!!!) high performance numbers crunches, DES cracking, shadow passwords.... the only trouble is the cost of the software only the university had the money, and the expertise to help us students to learn how to use them it is not as simple as programming a embedded processor you have to design the layout of the building block functions in the the chip and optimize the very limited data paths between the functional blocks. Very much like the way planners build citys in the USA only so many roads to many cars. That is were the performance hit is on these chips.
commnets email me:-
gcb33@dial.pipex.com
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Reading the comments, YES ...Fujitsu in the early to mid 90's were building ASIC's or FPGA on about a 18us substrate with more gates then the pentium 60 or 66 at the time with a lot higher clock speed. These were developed for prototyping DSP's (mobile phones' for the GSM standard to be releasd), MPEG's , soundcards , Graphics cards,at Uni on a electronic systems engineering course build chips from sand and designing OS, asked if they could be extended to a fully EE Programmable standard as at the time they were PROM only in usage. They did not see why not with a couple of these in a PCI card or you could design anything from dedicated Windows acceleators to console game emulators (ie PS2 anyone!!!) high performance numbers crunches, DES cracking, shadow passwords.... the only trouble is the cost of the software only the university had the money, and the expertise to help us students to learn how to use them it is not as simple as programming a embedded processor you have to design the layout of the building block functions in the the chip and optimize the very limited data paths between the functional blocks. Very much like the way planners build citys in the USA only so many roads to many cars. That is were the performance hit is on these chips.
commnets email me:-
gcb33@dial.pipex.com