Actually, getting rid of the synchronous constraints on memory access is one of the better ways to obtain faster performance with a clockless CPU. Writing to memories is still problematic (you need some kind of a delay line or a matched RAM Cell), but reading--you can just tag off of the sense amplifiers and use that as a "DONE" signal and start using the DATA.
Because a number of the asynchronous approaches use "DUAL RAIL" encoding, the signaling protocols match quite nicely the typical "Precharge/Evaluate" setup of a RAM readout. The result is that you get better-than-worst-case access times for the memory.
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You're probably thinking of GIMPshop. Haven't used it, but I do remember seeing it in another thread. http://www.gimpshop.com/index.shtml
Actually, getting rid of the synchronous constraints on memory access is one of the better ways to obtain faster performance with a clockless CPU. Writing to memories is still problematic (you need some kind of a delay line or a matched RAM Cell), but reading--you can just tag off of the sense amplifiers and use that as a "DONE" signal and start using the DATA. Because a number of the asynchronous approaches use "DUAL RAIL" encoding, the signaling protocols match quite nicely the typical "Precharge/Evaluate" setup of a RAM readout. The result is that you get better-than-worst-case access times for the memory.