Before everything else lets just answer the initial question:
"Yes, it would be very neat!"
Needless to say, auto-partitioning of a function into blocks is an interresting topic.
As i have a background as both a software guy (ada, c, java) and hardware guy (mainly vhdl) i often think about how simmilar the two areas are becomming. In both areas you try to design modular components that can be collected in a library and re-used.
To the point; Will future compilers generate code for a processor or will they generate functionblocks that are loaded into a gate array and communicates with other functionblocks on the same chip, or on another computer?
Considering that you only can clock a processor so fast, you have a better chanse to optimize the performace if your 'programs' run as functionblocks on a gate array (using bit serial algorithms?).
Something that would interrest me would be to design an 'operating system' that allowed a 'program' to allocate space on a gate array, provide I/O services, storage area in a ram (if you dont want to waste space in the array) and 'inter task' communications both on the same chip and via a network. Buy hey, now im just day-dreaming.
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Before everything else lets just answer the initial question:
"Yes, it would be very neat!"
Needless to say, auto-partitioning of a function into blocks is an interresting topic.
As i have a background as both a software guy (ada, c, java) and hardware guy (mainly vhdl) i often think about how simmilar the two areas are becomming. In both areas you try to design modular components that can be collected in a library and re-used.
To the point; Will future compilers generate code for a processor or will they generate functionblocks that are loaded into a gate array and communicates with other functionblocks on the same chip, or on another computer?
Considering that you only can clock a processor so fast, you have a better chanse to optimize the performace if your 'programs' run as functionblocks on a gate array (using bit serial algorithms?).
Something that would interrest me would be to design an 'operating system' that allowed a 'program' to allocate space on a gate array, provide I/O services, storage area in a ram (if you dont want to waste space in the array) and 'inter task' communications both on the same chip and via a network. Buy hey, now im just day-dreaming.