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User: roomba

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  1. Re:Sad on End Of The Line For Alpha · · Score: 1

    The Pentium Pro (which came out just before k5) was the first processor to use an internal RISC format, called PRISC (Pentium RISC). AMD followed with K5. So AMD is not more 'RISCy' than Intel. Besides, its *not* that current AMD and Intel chips are RISC architectures with x86 emulators. They're still x86 architectures: just that instructions, after being decoded, look more like RISC instructions. For the more technically inclined, this is needed because you want the register numbers and opcodes to be in fixed places internally. These architectures still need to decode complicated CISC instructions, and therefore, a number of pipeline stages are allocated to decode. Which was the original argument for RISC processors. There are no 'emulators' inside any of the AMD/Intel x86 processors. Maybe you were referring to the Itanium, which has an x86 emulator, or the Transmeta Crusoe, which also has one. I, for one, am a big fan of RISC architectures. Unfortunately, they're pretty much dead and buried, and that too for completely non-technical reasons. The mainstream general-purpose architecture is x86, which is a really ugly instruction set.