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Apart from a double-width atomic CAS, cmpxchg16b. You might think this isn't that important, but for lock free programming it really is.Intel implemented that within EMT64, and I believe AMD are going to implement it.
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Apart from a double-width atomic CAS, cmpxchg16b. You might think this isn't that important, but for lock free programming it really is.
Intel implemented that within EMT64, and I believe AMD are going to implement it.