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Domain: hal.com

Stories and comments across the archive that link to hal.com.

Comments · 6

  1. HAL Computer Systems? by mlinksva · · Score: 1 · on Fujitsu SPARC64-GP vs. Sun UltraSPARC II?

    I assume this is what became of HAL Computer Systems? Their SPARC64 roadmap looks out of date.

  2. HAL Computer Systems? by mlinksva · · Score: 1 · on Fujitsu SPARC64-GP vs. Sun UltraSPARC II?

    I assume this is what became of HAL Computer Systems? Their SPARC64 roadmap looks out of date.

  3. Re:Latency vs. bandwidth: It's both. by SirPoopsalot · · Score: 1 · on The Fundamentals Of Cache
    (Some, such as Alpha, go to Herculean extremes with a gigantic reorder buffer and a cache which allows four or five outstanding misses to pend while still allowing hits in the cache.)

    You want to hear Herculean?

    The processor I am helping design allows this:

    • The 512kB L2-Data cache can have 16 outstanding misses while still servicing HITs and non-cacheable transactions.
    • The 512kB L2-Instruction cache can have 8 outstanding misses wile still servicing HITs and noncacheables.
    • The 64MB (!!) L3-Unified cache can have all 24 of the L2 misses also outstanding, while still servicing HITs, victims from the L2D cache, as well as copy-backs non-cacheables, system controller requests, and non-cacheable transactions.
    • Request order is not maintained, but rather we services the requests as soon as it is possible.

    Sound like overkill? Maybe... but schemes like this explain why my company's 350MHz chips out-perform Sun's 450MHz equivalent. We spend a hell of lot less time accessing memory on the UPA interface, and we can more outstanding misses on that interface as well.

    SirPoopsalot
    HAL Computer Systems

  4. Re:Latency not bandwidth, surely! by SirPoopsalot · · Score: 1 · on The Fundamentals Of Cache
    Latency and bandwidth go hand-in-hand. They affect one another directly.

    If something is hogging the bandwidth of the RAM bus, this means that other requests for RAM access must be delayed until the hog is finished. This directly causes the latency of the of other request(s) to increase.

    Developing an architecture that minimizes bandwidth usage and latency is really tricky, and you can end up with all kinds of crazy mechanisms and whacky access protocols to facillitate this.

    SirPoopsalot
    SPARC64 L3 Cache Architect
    HAL Computer Systems

  5. "Hz" doesn't mean squat anymore! by SirPoopsalot · · Score: 1 · on Intel's Roadmap For the Future
    When are people going to realize that the clock speed of a processor means absolutely nothing?

    I'm a hardware engineer, working on a 1GHz sparc processor, and (if you really want it) I can build you a 2 GHz (or even a 3 or 4 GHz) processor right now... today.

    But...

    This doesn't mean that it will outperform a 500MHz machine at all.

    Intel can blow as much "GHz" smoke it wants out of it's ass, but it doesn't mean that the processor will be a top performer.

    But... the average dolt on the street thinks more Hz means higher performance, and the processor companies know this. So... they start dropping back the number of operations completed per clock cycle in order to run their clock frequency through the roof.

    The consumers think, "Oooooohh.... that's cool," and start buying cruddy processors with horrible architecture, simply because there is that friggin GHz tag stuck on it.

    Think about it for a second....

    If you have a 1GHz machine that does "X" operations per clock cycle, a 500MHz chip that performs "2X" operations per cycle will perform just as well , and probably cost 1/10th as much.

    It's the drooling, GHz-horny consumer that encourages these companies to unload crap into the market.

    signed,
    Sir Poopsalot
    Microprocessor Engineer
    HAL Computer Systems, Inc.

  6. Reduce it to the Max ! by The+GAP · · Score: 1 · on Smallest Transistor in the World

    The best has yet to come because with current technologies and knowledge, we can reach 1.6 GHz. But after that, the chip would melt anyway due to high temperature. 0.1 micron is the limit. Then we could multiply the numbers of processors but it's just a short term solution.

    I've heard that HAL computer systems (working for Fujitsu) is working a prediction method to find data before it is calculated to increase speed. A little like the machine O (the Oracle) of Alan Turing.

    There is also the MAJC computer of Sun that could be used to build a neuron network (like a machine B) to give more "smart" data processing.

    Finally there are also the Quantum Computers that could change everything but that's almost science-fiction

    All this information has been mainly taken from an article in LOGIN: