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http://www.pcworld.com/article/id,105963-page,1/ar ticle.html

http://whitepapers.techrepublic.com.com/webcast.as px?docid=154189

http://whitepapers.techrepublic.com.com/whitepaper .aspx?docid=284783

Sounds like Intel had been planning to scale Itanium to more than one core for a long time.

Do you have some information that says these Itanium 2 chips were never made?

Intel's site seems to say they do exist.

http://www.intel.com/products/processor/itanium2/

Excerpts from A Conversation with Gordon Moore: Moore's Law.[PDF]

...and then I quickly find this:

http://www.intel.com/network/connectivity/resource s/doc_library/tech_brief/wowlan_tech_brief.pdf

Last year I picked up an HP Pavilion A1540N running XP Media Center Edition, which is more or less Windows XP SP2. I was very annoyed to find that when I pressed the sleep button all the fans kept spinning. A bit of rummaging around led me to the control panel for Intel's Viiv Feature, which is intended to turn your PC into a 24x7 media control center. Well, call me a Luddite, but backwards me only wanted an economical PC on which to get my work done, and this high power, high noise sleep mode wasn't what I had in mind. Turning off Viiv seems to have solved "the problem". Sleep works fine now, and so does hibernate.

By the way, somewhere back in this thread someone mentioned a problem hibernating Windows machines with lots of resources (e.g. > 1GB Ram). FWIW, I had good luck applying Microsoft Update KB909095. There is also at the bottom of that page an announcement of another fix that specifically claims to be for hibernating with > 1 GB.

Anyway, the Viiv stuff was my main problem. You wonder just how many new power plants get built when companies ship this stuff enabled-by-default to people who don't need it.

You're either naive or just stupid if you think Intel already hasn't done the same thing.

Intel Vivv for instance:

http://www.intel.com/pressroom/kits/viiv/intelviiv technology_guide.pdf

Their Viiv platform is just chock full of it, from software to chipset :)

They have many PAGES just on DRM (if you use the search term digital rights management on their website, search is powered by Google's search API), and one of their Corporate Responsibility Reports for Stakeholder Engagement states and I quote, "... We are deeply engaged in developing digital rights management solutions that enable creative industries to launch new digital content business models--and bring innovative and exciting experiences to consumers..."

And to think, that is just the tip of the iceberg, like their involvement with Open Mobile Alliance Digital Rights Management amongst others. So yeah. Your fanboyism is well, silly in this respect.

Sweet OS indeed, late model Linux. But, whether we are talking about linux, winxp or vista, keep in mind that the OSs do not rely on the BIOS to initialize much hardware. Indeed, they will ignore most of the bios hardware preconfiguration and configure according to published specs. My new laptop, for instance, notifies me that the Pheonix bios contains PCI bios bug #81. Not a problem, since the kernel enumerates PCI devices itself.

This is one of the main things that made linuxbios possible! The amount of nondependant hardware initialization code in the linux kernel. Calling old world bios interrupt based functions can be more than a little tedious after you have jumped to 32 or even 64bit protected mode. Plans to do away with the old style bios have been underway for many years.

Oops... wrong chipset linked in my post... I meant Mobile Intel® 945PM Express Chipset... sorry!

No it is a limit of the chipset. The Napa chipset only support 32 bit physical addressing and a portion of that physical addressing range (starting from the largest address on down) is reserved for interfacing with the south bridge, PCIe buses, integrated graphics (if being used), etc. How much gets reserved is under software control but IIRC at least 256 MiB if not 512 MiB must be reserved. Also if certain hardware features are being used more must be reserved.

This is all outlined in the developer docs for the Intel® 975X Express Chipset

What I see is more the horrible state of software security. A security model that relies on all the writers of driver code in your computer to do their job right is a poor security model.

You're right. Unfortunately with the current design of PC hardware it's difficult to provide protection from poorly written drivers. For example, it's very common for drivers to be able to (a) initiate DMA transfers to/from any part of physical memory, and (b) lock the PCI bus by messing with the bus arbitration. You can do things like having an exokernel -- small trusted multiplexers go in the kernel and the larger parts of your drivers sit (untrusted) in userspace, but performance generally sucks. Some hardware (eg. graphics cards) makes it hard even to do this.

Luckily virtualisation is driving better solutions, and they're coming to a PC near you soon (in fact, they've already come to the PCs I'm using daily, but those are test articles). Primarily with virtualisation we want to be able to hand off devices to untrusted guest operating systems. For example give each guest its own physical network card. That won't work too well if guests can stomp on each others memory using DMA transfers. The new hardware actually has hardware support to stop the guests doing bad things.

Look at Intel's VT-d for example.

Rich.

Now I have another reason (other than processor heat) to stay away from AMD.

Enjoy your viiv, fanboy :)

Well, the Intel i965G is one Intel GPU not targeted for the budget/low power market, if that's what you mean.

No, I'm sure he meant what he said. It's very common to call it that.
Used here for example...
Although AMD renamed it
So did Intel

If you take a look on Intel's press materials pages, you can find a fair few. Take a look at their Pentium 4 pictures (scroll down) or this Penryn press release, for example.

If you take a look on Intel's press materials pages, you can find a fair few. Take a look at their Pentium 4 pictures (scroll down) or this Penryn press release, for example.

Look up "Intel NX" on GOOGLE...

http://209.85.165.104/search?q=cache:kV9lzNnuqxkJ: www.anandtech.com/cpuchipsets/showdoc.aspx%3Fi%3D2 111+%22Intel+NX%22+and+%22CPU%22&hl=en&ct=clnk&cd= 2&gl=us

"We are all familiar with AMD's much coveted "NX" or "No eXecute" feature; the Opteron/Athlon64 processor flags an exception when memory pages are marked as non-executable. If a malicious piece of code attempts to overwrite data in memory with instructions, the CPU will refuse to execute that page. Intel is also jumping on the NX bandwagon with its version of the technology called "XD", or "eXecute Disable." All Prescott based CPUs including Pentium 4, Xeon and Celeron D will support the XD feature with the "E-0" processor stepping. The Intel roadmaps hinted that these XD-enabled processors are detectable by a slightly different SKU. For example, a E-0 stepped Intel 520 processor may be marked as 520J. It is also said that a majority of new Pentium M processors will carry XD functionality. Unfortunately, these new "J" suffixed units are only for the Socket 775 architecture."

ALSO, check this out, from the horses' mouth @ INTEL:

http://www.intel.com/business/bss/infrastructure/s ecurity/xdbit.htm

"Execute Disable Bit and Enterprise Security

The challenge

Malicious buffer overflow attacks pose a significant security threat to businesses, increasing IT resource demands, and in some cases destroying digital assets. In a typical attack, a malicious worm creates a flood of code that overwhelms the processor, allowing the worm to propagate itself to the network, and to other computers. These attacks cost businesses precious productivity time, which can equal significant financial loss.

The solution

Intel's Execute Disable Bit functionality can help prevent certain classes of malicious buffer overflow attacks when combined with a supporting operating system.

Execute Disable Bit allows the processor to classify areas in memory by where application code can execute and where it cannot. When a malicious worm attempts to insert code in the buffer, the processor disables code execution, preventing damage and worm propagation.

Replacing older computers with Execute Disable Bit-enabled systems can halt worm attacks, reducing the need for virus-related repairs. In addition, Execute Disable Bit may eliminate the need for software patches aimed at buffer overflow attacks. By combining Execute Disable Bit with anti-virus, firewall, spyware removal, e-mail filtering software, and other network security measures, IT managers can free IT resources for other initiatives.

By familiarizing yourself with the various standards available for maintaining WLAN security, understanding some of the issues involved in security breaches, and applying security best practices in your organization, you can ensure that your data is safe and secure.

  Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting operating system. Check with your PC manufacturer on whether your system delivers Execute Disable Bit functionality." :)

In other words, it's been around for a while now... & can help.

APK

Sorry, had to check this one out.

AMD established in 1969.

Intel's first microprocessor chip (4004, see http://www.intel.com/museum/online/hist_micro/hof/ index.htm) was released in 1971 and cost less than $100. They established in 1968 however.

There are some suggestions that the R8000 was the most expensive microprocessor: "As the price list indicates a Power Indigo with a R8000 CPU and Extreme graphics was priced at $61,500 with 128mb ram and a 2gb system disk (1993-94 pricing). " (from http://www.blackcube.org/sgi.html ). In '92 an R4000 based system was around $40k. So, it seems reasonable that the R8000 chip cost (retail) about $20k more than the R4000.

Granted this wasn't "before AMD" but was probably before the competition between AMD and Intel made such a difference to the home PC market. Nevertheless I get geek-cred points here surely!!!???!!11

Yeah, they're looking ahead too eagerly. That's what academics do.

Let's not forget that Intel and IBM both recently found a manufacturing process to keep Moore's law going for the next several years. Most people in 2006 thought we hit a wall, and that the multicore revolution was inevitably under way, but that just might not be true anymore. That said, it is always nice to have at least a few cores in available in your system.

At the same time, AMD's Fusion strategy looks pretty interesting. I really wonder what's going to become of that.

I guess they are thinking of this: Intel's 80-core research CPU.

Only catch is if I hook up a drive while in Windows with that converter, it'll lockup. Has to be turned on before I boot the computer. This is a limitation of the adapter; from what I've read, you should be able to hot swap with a "real" eSATA port.

Another possible reason for your inability to hot-swap is that the SATA ports might be set to "IDE mode" in the motherboard's BIOS. This is a common setup on "home-built" computers since "IDE mode" allows pre-Vista Windows installation without the "F6 (floppy) installation method." To enable hot-swap, the SATA ports must be set to "SATA/AHCI mode" in the BIOS.

Here's some instructions from Intel's site on changing SATA modes on their motherboards:

• Troubleshooting Serial ATA / RAID Issues - SATA Modes (AHCI; Hot Swap)
  The SATA controller has three modes of operation:
  • IDE mode - no AHCI, no RAID
  • SATA mode (sometimes called AHCI mode) - AHCI enabled, no RAID
  • RAID mode - AHCI enabled, RAID enabled
  AHCI mode also allows for Hot Swapping drives.

Only catch is if I hook up a drive while in Windows with that converter, it'll lockup. Has to be turned on before I boot the computer. This is a limitation of the adapter; from what I've read, you should be able to hot swap with a "real" eSATA port.

Another possible reason for your inability to hot-swap is that the SATA ports might be set to "IDE mode" in the motherboard's BIOS. This is a common setup on "home-built" computers since "IDE mode" allows pre-Vista Windows installation without the "F6 (floppy) installation method." To enable hot-swap, the SATA ports must be set to "SATA/AHCI mode" in the BIOS.

Here's some instructions from Intel's site on changing SATA modes on their motherboards:

• Troubleshooting Serial ATA / RAID Issues - SATA Modes (AHCI; Hot Swap)
  The SATA controller has three modes of operation:
  • IDE mode - no AHCI, no RAID
  • SATA mode (sometimes called AHCI mode) - AHCI enabled, no RAID
  • RAID mode - AHCI enabled, RAID enabled
  AHCI mode also allows for Hot Swapping drives.

Well, I just went through that exercise after researching for a few months. My goals (in order) were 100% free drivers, a significant decrease in noise and heat from my previous system, and small size. As a side benefit, I ended up completely legacy-free. Here's what I ended up with:

• Intel DG965PZ
• Intel Core2 E6600
• 4GB memory, two KVR800D2N5K2/2G kits
• WD1600AAJS 160GB HDD
• Plextor PX-755SA dual-layer DVDRW
• aOpen B200 case
• Samsung 244T 24" LCD

In case you missed it, Intel released two 50W quad-core CPUs (L5320 and L5310) last week for dual-processor servers and workstations. They're 1.86GHz and 1.60GHz with 1066MHz FSB.

specs

I heard Oxygen is also popular among breathers.

You will find that there is an interesting correlation every year between the Research Science Institute participants and the Intel STS winners. RSI is a program that is run in cooperation with MIT where high school students spend their summer before senior year doing research with MIT professors. Intel has even noticed the connection and they have a page on it. Out of the list of top ten Intel STS winners, the following were at RSI in 2006:

Mary Masterman (1)
Dmitry Vaintrob (3)
Megan Blewett (7)

Pretty good for a program that only accepts 50 American students (IIRC). The usual suspects used to show up as Lucent Global Science Scholars as well, but that program was unfortunately ended in 2005.

In my experience, the key to high school and undergraduate research is a teacher/professor that pushes the student far beyond what he or she knows. A high school student just doesn't have enough experience to come up with truly groundbreaking research. However, amazing things can happen when the teacher/professor exposes the student to advanced concepts which their minds need to struggle to understand. The student will often approach the problem in a different way then the researchers in the field, which will sometimes lead to a new and unexpected result.

The main difficulty is that it can be really frustrating and demoralizing for a student to be in a place where they have to struggle to understand a concept. I think a lot of high schoolers and undergrads get discouraged when they have difficulty understanding a concept. Educators just need to keep that in mind and reassure students that the learning process is an important component of doing good research.

Yup, this is the downside of the whole Media PC thing - someone comes up with a spec, and you know manufacturers are just going to abuse it. Two GB of ram, on a system that can't play games well, and sits in your livingroom? What a waste!

Back when I heard about this spec, I was interested because I thought it might force manufacturers to bundle a decent video chip in the under $1000 range - but then I read the spec, saw nothing about minimum video requirements, and promptly ignored it as the marketing gimmick it was.

So yes, your $1000 PC has a chipset designed for $500 PCs (Fast Ethernet, crappy integrated graphics), and manufacturers are rolling in the dough, because the extra memory is cheaper than a video card. About the only good thing you can say is: it comes with a PCIe 16x slot. But then, so does almost EVERY PC these days, even the $400 ones.

A somewhat related topic, I wanted to mention it:

The only reason the G965 graphics outperforms the 6150 is because of the Core2 Duo processor. Most people don't realize this, but the uber-powerful GMA X3000 is actually running without hardware vertex shaders for the moment. Hardware vertex shader drivers have been promised for the last 6 months, with no end in sight. This is actually the reason for many game compatibility problems with the X3000 (and low performance), because very few games offer a software vertex processing path.

So, this 8-pipe monster only gets slightly better performance than a pathetic 2-pipe IGP from Nvidia, and it only manages that because of the incredible power of the Core 2. People have also seen marked performance increases using Core2 Duos with 850-series IGPs, for the same reason. Of course, this will backfire once game designers start using the second core for AI/physics, so Intel needs to release those drivers eventually.

Heres a link: http://www.intel.com/products/processor/manuals/in dex.htm

Intel's compiler (icc), available for Linux, Windows, and FreeBSD extends OpenMP to clusters.

You can build your OpenMP code and it will run on clusters automatically. Intel's additional pragmas allow you to control, which things you want parallelized over multiple machines vs. multiple CPUs (the former being fairly expensive to setup and keep in sync).

I've also seen messages on gcc's mailing list, that talk about extending gcc's OpenMP implementation (moved from GOMP to mainstream in gcc-4.2) to clusters the same way.

Nothing in OpenMP prevents a particular implementation from offering multi-machine parallelization. Intel's is just the first compiler to get there...

The beauty of it all is that OpenMP is just compiler pragmas — you can always build the same code with them off (or with a non-supporting compiler), and it will still run serially.

Intel's compiler (icc), available for Linux, Windows, and FreeBSD extends OpenMP to clusters.

You can build your OpenMP code and it will run on clusters automatically. Intel's additional pragmas allow you to control, which things you want parallelized over multiple machines vs. multiple CPUs (the former being fairly expensive to setup and keep in sync).

I've also seen messages on gcc's mailing list, that talk about extending gcc's OpenMP implementation (moved from GOMP to mainstream in gcc-4.2) to clusters the same way.

Nothing in OpenMP prevents a particular implementation from offering multi-machine parallelization. Intel's is just the first compiler to get there...

The beauty of it all is that OpenMP is just compiler pragmas — you can always build the same code with them off (or with a non-supporting compiler), and it will still run serially.

Intel's compiler (icc), available for Linux, Windows, and FreeBSD extends OpenMP to clusters.

You can build your OpenMP code and it will run on clusters automatically. Intel's additional pragmas allow you to control, which things you want parallelized over multiple machines vs. multiple CPUs (the former being fairly expensive to setup and keep in sync).

I've also seen messages on gcc's mailing list, that talk about extending gcc's OpenMP implementation (moved from GOMP to mainstream in gcc-4.2) to clusters the same way.

Nothing in OpenMP prevents a particular implementation from offering multi-machine parallelization. Intel's is just the first compiler to get there...

The beauty of it all is that OpenMP is just compiler pragmas — you can always build the same code with them off (or with a non-supporting compiler), and it will still run serially.

...you know, there is a computer education program for school teachers by Intel which certainly exists in other countries, too. Participating nets you a free copy of Microsoft Office (a few years ago this was Office 2000 Premium) under some special license. Actually it is no license at all, because the package says "Non-licensed software! Don't use without separate license by Microsoft!"

The first details emerged half a year ago:


IBM and Intel Corporation, with support from dozens of other companies, have developed a proposal to enhance PCI Express* technology to address the performance requirements of new usage models, such as visualization and extensible markup language (XML).

The proposal, codenamed "Geneseo," outlines enhancements that will enable faster connectivity between the processor -- the computer's brain -- and application accelerators, and improve the range of design options for hardware developers.


http://www.intel.com/pressroom/archive/releases/20 060927comp_a.htm

This sort of thing is why security people sometimes act so devoid of hope.

Yes. The ability to directly access memory space by address from a FireWire connection is a totally inappropriate "feature" on a machine with an operating system. It's intended for embedded system debugging and remote device control. The FireWire interface hardware has it off by default. Windows has to explicitly turn it on. Despite the fact that, as far as I know, that feature is never used for anything legitimate.

And yes, it's broken in Linux. I just looked at the hardware spec (see figure 5-28) and the source code for "fw-ohci.c", and there it is:

reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);

That line says "external FireWire packets can access any physical address below (0x10000 << 16)", or, in other words, the first 4GB of memory. Apparently this security hole hasn't been upgraded for 64 bits yet, although the hardware supports a 48-bit memory address. Note the lack of any comments in that area. That one bit opens up a huge security hole, one known for three years, and nobody has fixed it.

I'd suggest changing that value to 0, which turns this "feature" off.

With a little bit of additional investigative work (I clicked on the button that said "View Complete Thread" under the pthreads better than Win32 threads posting), I discovered a post that may shed some light on Mr. Breshears' change of heart:

...There is, however, some things that win32 threads did better then posix threads. The WaitForMultipleObjects allows you to decouple the signaling and waiting threads better. In posix, if some thread wants to wait on multiple conditions, there has to be a condvar especially for that and the signaling thread has to know about it. In win32, the signaling thread only has to signal the events it knows about and not have to worry about other threads waiting for mulitple events, though there still the problem of events being lossey. Also win32 threads are more orthagonal. You do not have have totally different and incompatible signaling mechanisms like unix select/poll and pthread condvars. The kludges to make those work together are incredible....

It appears that a posting my someone called Joe Seigh may have given Mr. Breshears another perspective to consider. That he was willing to change his position, rather than stretch to justify an original stance, shows some character that often is missing from those who publically express a point of view. I would not be surprised if we saw Mr. Breshears arguing sometime in the future that pthreads are better than Win32 threads---perhaps after pthreads have come out with some innovations that make them even more effective.

Hmmm, they do one for the Mac now they're on Intel chips. But it looks like I need Windows CE to get tech support. Pity.

http://softwareblogs.intel.com/2006/10/19/why-wind ows-threads-are-better-than-posix-threads/#comment -1322

Read Full reply here: http://softwareblogs.intel.com/2006/10/19/why-wind ows-threads-are-better-than-posix-threads/#comment -1322

My Selected Quote:

In summary, love me, hate me, remain ignorant of me, I don't mind either way. If
I've lost all possible credibility with you, I hope you'll give me a chance to
win you back with my most recent blog
(http://softwareblogs.intel.com/2007/02/23/do-we-n eed-another-parallel-programmi
ng-language/) and future posts. If you want to continue with the ad
hominem attacks, please take them somewhere else, like back to slashdot.org.
If you want to debate the merits of Pthreads vs. Windows Threads, I invite you
to stay and speak up. Ultimately, that is what I did it for: to start a dialog
about threading and how best to do it.

And if memory serves, Intel use to do compilers?

They still do.

Intel Compilers

Not quite, but I did leave a comment in his blog asking why.

http://softwareblogs.intel.com/2006/10/19/why-wind ows-threads-are-better-than-posix-threads/#comment -1284

http://www.intel.com/technology/magazine/computing /robson-1206.htm

If you do lots of read/writes, in theory you should see better performance from RAID 5; more spindles = more reads (as long as the data is distributed across multiple disks).

I'd suggest something like http://www.intel.com/design/servers/storage/ss4000 -E/index.htm or http://www.enhance-tech.com/products/desktop_array /desktoparray_Index.htm to solve several of your issues depending on how you implement it.

If you set it up as it's own storage/backup server, then you're looking at network speed as your bottleneck. If you install it as a cage within your system (not sure if these models can), you're at least providing RAID 1, 5 or 10 redundancy, but you'll still have other factors (P/S, environment) impacting the drives.

Personally, if I had the money I'd have an iSCSI array like http://www.equallogic.com/products/view.aspx?id=46
Anyone want to float me $20k. :-)

• Athlon 64 X2 is their dual-core offering, available for Socket AM2 and Socket 939 motherboards.
• Athlon 64 FX is their high-end single-core offering, available for Socket AM2, Socket 939, Socket 940, and Socket F (server) motherboards.
• Athlon 64 is their mid-range single-core offering, available for Socket AM2, Socket 939, and Socket 754 motherboards.
• Sempron is their low-end ("value") single-core offering, available for Socket AM2 and Socket 754 motherboards.

• Athlon 64 X2 is their dual-core offering, available for Socket AM2 and Socket 939 motherboards.
• Athlon 64 FX is their high-end single-core offering, available for Socket AM2, Socket 939, Socket 940, and Socket F (server) motherboards.
• Athlon 64 is their mid-range single-core offering, available for Socket AM2, Socket 939, and Socket 754 motherboards.
• Sempron is their low-end ("value") single-core offering, available for Socket AM2 and Socket 754 motherboards.

Using another semiconductor than silicon for the CPU? Or a radical change in the design of the CPU or orther components? Are there experts here who can elaborate on this?

Performance per watt is a biggie for chip manufactures. Having a less than 10 watt server chip is possible, but who wants to use a Palm Pilot for a transaction server?

Having the performance to handle a slashdotting is what is needed in many servers. Performance is first, power consumption is second. That is why the performance per watt is an important part of the chip design. Low power chips is not the main design item. High performance is the most important. Providing that performance at the lowest power possible is the sweet spot chip designers aim for.

Here is additional reading. Look at what the Core 2 Duo and quad is bringing to the server market.
Please note the Woodcrest and Operon is now obsolete. The Operon was leading, but the new multi-core chips are a new race in the performance per watt race.

http://www.computerworld.com/blogs/node/2160

http://www.intel.com/performance/server/xeon/ppw.h tm

http://www.supermicro.com/newsroom/pressreleases/2 006/press081406.cfm

http://news.com.com/Chipmakers+admit+Your+power+ma y+vary/2100-1006_3-6082352.html

Not so fast! Apple's systems have been booting from network images and supporting network installation, if memory serves, before such tricks were even possible on the Windows PC due in part to their use of Open Firmware way back when (they use EFI now-a-days). Network boot and install was difficult and unreliable on the Windows PC until quite recently. I was told by various vendors including Dell as recently as two years ago (some of their models worked and some of them didn't) that limitations of the firmware in most PCs were to blame. In private conversations the engineers working on these products admitted that they were basically waiting for the hardware to catch up and that certain models which my client had just purchased (by the many thousands) would probably never work reliably for network booting and network install due to these issues. On the PC platform there were various remote management hacks, uh, initiatives, like WOL and PXE designed to help get around the hurdle of broken-by-design PC firmware. Finally a modern (e.g. extensible and thus as capable as the decades-old Open Firmware platform) firmware for the PC was designed by Intel, the EFI - Extensible Firmware Interface.

On the Macintosh, by contrast, remote booting and remote installation "just worked". For years. Even before the Intel based Macintosh. Yes. It did. No kinda sorta about it. When Windows LAN administrators were wasting bazillions of dollars in the systems integration labs of Fortune 500 and government agencies all over the world, this "just worked" on the Macintosh.

Various products, including some from IBM, are available to assist with remote management of the Macintosh, not to mention the nice built-in stuff like OpenDirectory.

NetBoot and Network Install
NetOctopus
IBM TIvoli Storage Manager

IBM, by the way, makes multiple overlapping (and sometimes competing) software distribution and imaging products. You have, I think, seen one of their other products, the name of which keeps changing to escape it's reputation as being utterly craptastic, but which usually has something like "Remote" in the name. What you (most likely) saw was called (if memory serves) RIM (Remote Installation Manager) and is presently marketed as IBM Remote Deployment Manager part of a product suite called IBM Director. This product doesn't support the Macintosh but that doesn't imply that the Macintosh isn't ready for the enterprise. It might, in fact, imply the opposite -- that Windows isn't really ready for enterprise scale deployment.

There are litterally tens of billions of dollars per year worth of enterprise systems management products on the market which are totally irrelevant to managing an enterprise network of Macintosh computers not because they don't support the Macintosh (which I freely admit most of them do not) but because the Macintosh doesn't need them to be deployed and managed at a large scale. These products largely exist to fix things which are broken in Windows, things which are problems only when you need to deploy and manage lots of machines, things which are not broken in Mac OS X. (I know this because I am an enterprise systems and network architecture consultant, and I help fix scalability problems related to enterprise systems management for Fortune 500 and government clients.)

I wish that I could do a case study comparing two interesting organizations with which I am intimately familiar, but unfortunately I learned this stuff off the record and cannot reveal the organization names.

I don't think you were listening very carefully to the talk (or know much about Computer Architecture) if you think Dave Patterson is a supercomputer guy. Perhaps you've heard of the Hennessy & Patterson Quantitative Approach to Computer Architecture book (you know, the one used at basically every university to teach about computer architecture). Patterson has been involved in a lot of different things within computer architecture over the years, including being one of the main people behind RISC and RAID (as well as being the president of the ACM). I saw his talk when it was given at Berkeley, and you really missed the point if you thought it was about supercomputing. The talk was about the future of computing in general, which is increasingly parallel, in case you're unaware of that fact. GPUs are already at 128 cores, Network processors are up to 200 cores. Intel is going to present an 80 core x86 test chip tomorrow at ISSCC. Physics won't support faster single core processors at the rate we're accustomed to, so the whole industry is going parallel, which is a sea change in the industry. Patterson's talk is aimed at the research community, since we don't have good answers as to how these very parallel systems should be architected and programmed. FPGA emulation is a great way to play around with massive multiprocessor configurations and programming strategies, which is why Patterson is advocating it (his RAMP project has researchers from MIT, Berkeley, Stanford, Texas, Washington involved (among others)). You also need to have a little more imagination about what we could do with more computing power. Try looking at Intel's presentations on RMS http://www.intel.com/technology/itj/2005/volume09i ssue02/foreword.htm.

Here's a cool article from my own university, about the recent breakthrough a professor here had with his Indium-Phosphide bonding to Silicon (which is obviously much cheaper to make electronics on. InP is the material needed to make photonics like lasers etc. at optical communications wavelengths). Maybe this will enlighten a few of you that wanted more detail. http://www.intel.com/research/platform/sp/hybridla ser.htm The technology splitting up the polarizations of a lightwave is probably a regeneration technology, correcting for 'chirp' or 'dispersion' (a pulse broadening out after travelling) but they got it to work on SIlicon. Maybe even using Bower's InP/Si bonding technology. I'll go try to find the original MIT article and see... enjoy!

• Each of Barcelona's four cores incorporates a new vector math unit referred to as SSE128

• And separating integer and floating-point schedulers also accelerates this thing called virtualization

• Barcelona blacks out power to individual portions of the chip that are idled, from in-core execution units to on-die bus controllers. This hasn't made it into PCs before ...

• Barcelona adds Level 3 cache, a newcomer to the x86

• Barcelona is genius, a genuinely new CPU that frees itself entirely of the millstone of the Pentium legacy.
• Barcelona is a new CPU, not a doubling of cores and not extensions strapped on here and there.

I'm not meaning to detract from AMD here - the fact that they have still not had to make any radical changes to the opteron micro-architecture is a testament to the quality of the original design. They are slightly ahead of the game on virtualization - they're going to beat Intel to nested page tables - but other than that this chip is playing catchup. Overall this is going to be a very nice piece of kit to work with. But nothing radical and new here.

G.

Another reasonable and well thought out claim from the RIAA. Someone inform Intel that a single transistor should still cost about a dollar, they're losing money by the fistful.

They figured out how to make them faster better cheaper. Have you seen Intel's R & D budget? Intel has figured you can make a profit in volume sales. Making lots of units at low prices can cover very high production costs. They spend lots on their product to improve the quality and value. I wish I could say the same for the RIAA who in the same time frame have not improved the number of minutes or tracks on a CD and reduced quality by over compression, loss of dynamic range, and technical problems with CD's that don't work and break things.

Q1 outlook 2007 for R & D for Intel;

Expenses (R&D plus MG&A): Between $2.6 billion and $2.7 billion. In addition, the company expects a first-quarter restructuring charge of approximately $50 million.

http://www.intel.com/intel/finance/bus_outlook.htm

If the RIAA kept up with Intel in the same time frame, they would have CD's out with the $33 price point, but would have to kept up with the times. The 8088 processor ran 4.77 Megahertz. Most current Prescott P4's run at 3,400 Megahertz (3.4 GHZ)

The 8088 had 49,000 transistors in 1978. The 286 had 134,000 transistors in 1982. The 386 had 275,000 in 1985. The 486 had 1.2 million in 1989. The pentium in 1993 had 3.1 million transistors.

Since we are looking at a time frame of "The RIAA 'Key Facts' page claims that based on the 1983 price of CDs, the 1996 price should have been $33.86." we can take the numbers from Intel's 1983 processor the 286 at 134,000 transistors and the 1996 Pentium processor at 3.1 million transistors. (Pentium II in developement at 7.5 million transistors released a year later in 1976)

In the same time frame the CD went from 8-12 tracks average to 8-12 tracks average. To keep up with technology like the computer, it would have had to go from about 10 tracks to about 300 tracks at about the same selling price. Napster almost reached that value.

Intel data gleaned from; PDF aleart.. http://www.intel.com/pressroom/kits/core2duo/pdf/m icroprocessor_timeline.pdf

If Intel tried to continue selling 4.77 MHZ CPU chips today at adjusted for inflation prices, they too would have volume sales problems. Somebody wake up the RIAA and have them smell the coffee.

Another reasonable and well thought out claim from the RIAA. Someone inform Intel that a single transistor should still cost about a dollar, they're losing money by the fistful.

They figured out how to make them faster better cheaper. Have you seen Intel's R & D budget? Intel has figured you can make a profit in volume sales. Making lots of units at low prices can cover very high production costs. They spend lots on their product to improve the quality and value. I wish I could say the same for the RIAA who in the same time frame have not improved the number of minutes or tracks on a CD and reduced quality by over compression, loss of dynamic range, and technical problems with CD's that don't work and break things.

Q1 outlook 2007 for R & D for Intel;

Expenses (R&D plus MG&A): Between $2.6 billion and $2.7 billion. In addition, the company expects a first-quarter restructuring charge of approximately $50 million.

http://www.intel.com/intel/finance/bus_outlook.htm

If the RIAA kept up with Intel in the same time frame, they would have CD's out with the $33 price point, but would have to kept up with the times. The 8088 processor ran 4.77 Megahertz. Most current Prescott P4's run at 3,400 Megahertz (3.4 GHZ)

The 8088 had 49,000 transistors in 1978. The 286 had 134,000 transistors in 1982. The 386 had 275,000 in 1985. The 486 had 1.2 million in 1989. The pentium in 1993 had 3.1 million transistors.

Since we are looking at a time frame of "The RIAA 'Key Facts' page claims that based on the 1983 price of CDs, the 1996 price should have been $33.86." we can take the numbers from Intel's 1983 processor the 286 at 134,000 transistors and the 1996 Pentium processor at 3.1 million transistors. (Pentium II in developement at 7.5 million transistors released a year later in 1976)

In the same time frame the CD went from 8-12 tracks average to 8-12 tracks average. To keep up with technology like the computer, it would have had to go from about 10 tracks to about 300 tracks at about the same selling price. Napster almost reached that value.

Intel data gleaned from; PDF aleart.. http://www.intel.com/pressroom/kits/core2duo/pdf/m icroprocessor_timeline.pdf

If Intel tried to continue selling 4.77 MHZ CPU chips today at adjusted for inflation prices, they too would have volume sales problems. Somebody wake up the RIAA and have them smell the coffee.