Slashdot Mirror

There is a big difference in lead with regard to radiation - the actual problem is the decay of Polonium (one of lead's daughter products). On an episode of "Treasure Quest", they made a big deal about explaining that chip manufacturers were willing to pay huge amounts of money for lead that was not contaminated with Polonium. It's called low alpha lead - here are some links:

Semiconductor International Article

mentions the show

Finacial Article

There is a big difference in lead with regard to radiation - the actual problem is the decay of Polonium (one of lead's daughter products). On an episode of "Treasure Quest", they made a big deal about explaining that chip manufacturers were willing to pay huge amounts of money for lead that was not contaminated with Polonium. It's called low alpha lead - here are some links:

Semiconductor International Article

mentions the show

Finacial Article

EETimes has "IBM Research claimed a keystone achievement in on-chip optical communications Wednesday (March 3), saying its 40-gigabit-per-second (Gbps) germanium avalanche photodetector completes what it calls the nanophotonic toolkit." (link) (A few days before announcing 2,500 layoffs, hmmm...)

...And the same news from Semiconductor Intl.

The two key technologies are a more advanced form of "source mask optimization" (SMO) than has been used to date, and "ability to program the lithography illumination source at the grayscale pixel level". A very readable account is here: http://www.semiconductor.net/article/CA6597205.html More detailed information on current and older SMO techniques can be found at these links: http://www.luminescent.com/pdf/PMJ08_079_Minimize_MEEF_in_Low_K1_Lithography.pdf http://wps2a.semi.org/cms/groups/public/documents/membersonly/van_schoot_presentation.pdf

Yeah, Intel's way ahead of the competition at this point. TSMC is just rolling out 40/45nm, and they say their process doesn't have any performance advantages over 65nm.

http://www.semiconductor.net/blog/270000427/post/10025801.html

AMD's 45nm is coming too, but I haven't heard much about it.

http://www.semiconductor.net/article/CA170390.html

Whatever one thinks of the war in Iraq, it has forced us to prioritize scientific and engineering issues we previously had not emphasized. As they say, necessity is the mother of invention. For example:

Techniques to defeat highly asymmetric warfare tactics such as the use of IEDs. There's been a lot of money pouring into trying to solve that problem, because solutions will save lives. Google "counter IED" and you get an idea of the communications and jamming technologies involved.

Trauma medicine has been getting a lot of innovation. For example, the Pentagon has a 250 million dollar effort to create the ability to regrow limbs, noses, etc of wounded soldiers. The HemCon bandage, a portable heart-lung machine, and improvements in treatment methodologies are discussed here.

Materials science has been getting the kind of attention it hasn't seen in a long time. One example with obvious civilian application is the push for novel flame-retardant woven and knitted fabrics.

Looking more to the future, the war's need for intelligence from foreign-language sources has driven DARPA to fund automatic translation research. That's a real tough problem, but if they can solve it has enormous civilian applications.

The list goes on an on. I'm not saying it justifies a war, but war certainly does drive scientific and engineering research to solve thorny real-world problems.

Huzzah! For the first time in 25 years, the name MOSFET ( Metal -Oxide-Semiconductor Field Effect Transistor) will correctly describe the device that goes by that name!

Sort of. The gate is still mostly poly, with a relatively thin metal layer below it. Also, the devices use a high-k material like HfO2 for the dielectric, with a thin silicon oxynitride mobility enhancement layer. There's a decent overview at Semiconductor International

Research says: no. Not on an integrated circuit. PCB's can have multiple layers, but the actual silicon of the chips cannot. That area of 3D chips is still in development (as I said above). Parent isn't informative, he's incorrect.

You mean on a modern PCB. An IC is a different ball of wax, and they're limited to a single layer at the moment. I mean, the research on 3D silicon techniques was still being presented as research a year ago.

If I could build my own transistors, things get very interesting. If I can build transistors myself, that means I can print a gate array to spec.

Heck, I could even print my own CPU, FPU, or whatever... the GPL coverage of printed hardware could be very interesting. ;-)

Now I can focus on my ideas from 10 years ago with programmable cells that operate on one bit at a time, talking to their neighbors in a grid... 1,000,000 single bit computers working in parallel... move over Beowolf, hello task specific metahardware. The future is fun!

--Mike--