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AMD Announces Triple-Core Phenom Processors
MojoKid writes "AMD has officially announced their triple-core Phenom multi-core processor offering, suggesting a triple-threat of processors, from dual-cores to triple-cores and native quad-cores coming to market this year. While the term symmetric multi-processing (or SMP) suggests a balanced approach of multiple cores in an even number of engines working together on a single workload, AMD offers that an odd number of processors can slice at that workload just as efficiently. Time will tell how this architecture will scale amongst various multi-threaded applications and real-world usage models. AMD is definitely moving to make use of these quad-cores that don't quite make the cut by testing them fully as triple-cores and realizing some revenue, rather than throwing them away."
Damnit, I haven't even used up all the cartridges that came with my Intel Core Duo!
Um. Is this even possible?
I was under the impression that all CPUs must be added in integer powers-of-two, of which 3 is not.
I'm holding out for a processor that goes to 11.
Probably well over 3GHz. Should be quite good for gamers.
Chip makers have been doing this for so long I can't actually remember when it started. Now it's cores, but it used to be cache. The chip doesn't pass QA, gets downclocked or rebranded for less cache and sold to the economy sector. Not earth-shattering news.
Put identity in the browser.
Why Yes. Yes it does. From HERE: Inside, the Xbox 360 uses the triple-core IBM designed Xenon as its CPU. While graphics processing is handled by the ATI Xenos which has 10 MB of embedded eDRAM, its main memory pool is 512 MB in size.
There is no "I disagree" mod for a reason. Flamebait, Troll, and Overrated are not substitutes.
SMP doesn't suggest the number of cores should be a power of two, it doesn't even suggest "even number of cores".
It's about multiple cores processing simultaneously. Check the article I link to, even the damn example diagram has 3 cpu-s.
So when does the race to unlock the fourth unused core on a triple-core processor start? What's Next? Hard drive platters?
Wouldn't it make sense to sell any part that had at least one working core? Meaning that if in making quad-core chips, W% of them ended up only having one working core, X% had 2, Y% had 3, and Z% had four, wouldn't it make the most sense to sell all of these chips?
This implies that they have a way to use all four cores independently. Maybe they can't; maybe one core is "special", like the "master" core that has to be working for anything to work. Also this implies that the cores can detect that their sibling(s) aren't working and switch to a mode in which the sibling is not used at all.
Also, a question - when a core doesn't function properly, is it somehow disabled completely so that it doesn't use any power? Or maybe a core that isn't being fed any instructions doesn't use any power anyway?
And why should ``symmetric'' imply even? It merely implies that all cores see memory with the same class of service. And, in reality, aren't most AMD multiprocessors cc-NUMA machines, not SMP?
For most workloads, if they are fairly multithreadable, 3 processors available will be just fine. I know of very few workloads that require an even number of processors, and even if it were the case that the task were split into an even number of threads, the OS should have no problem scheduling on a reduced number of processors.
Hey, doesn't the XBox 360 have a 3-core PPC in it?
-- Erich
Slashdot reader since 1997
"I wonder if you could build a whole computer from factory rejects."
Yes. Tandy use to make them.
This is an interesting business strategy that plays to AMD's ability to sell partially-defective quad-core dies (confirmed by AMD in http://www.news.com/8301-13579_3-9780049-37.html). It should let AMD increase revenues per wafer, offer a nice mid-performance product, and play some product mix games with clocking -- selling a processor as either a higher speed triple-core or a lower-speed quadcore chip. And there's no reason why core count must be powers of two or even or anything.
Yet I can't help but wonder if customers will think twice about buying a 75% functional chip. It will be interesting to see how AMD spins this and how customers receive the product.
Two wrongs don't make a right, but three lefts do.
Here extracted for your amusement, in italic glory:
"While the term symmetric multi-processing (or SMP) suggests a balanced approach of multiple cores, in an even number of engines, working together on a single workload"
SMP doesn't suggest anything of the sort. Yes, it doesn't make sense and the author pulled it out of his bottom, but, it sounds interesting, PRINT IT!!!
Symmetric just means the processors are equivalent (they all do the same generic tasks)... As opposed to an asymmetric system where different processors are assigned different roles (one does interrupts, one does graphics, one does IO, etc)...
SMP refers to the fact that all the processors are identical and share the same memory (in contrast to NUMA designs like multi-chip Opteron systems). However, I've seen more and more people refering to cache coherent NUMA designs like multi-core opteron and the upcoming CSI based intel systems as SMP systems which, while a stretch of the definition, is at least reasonable.
Suggesting that SMP has anything to do with having an even number of processors is just DUMB. It may be the case that SMP systems usually have an even number of cores (I don't know) but that's not what the writeup or article seem to be saying.
If you liked this thought maybe you would find my blog nice too:
That's not a bug, that's a feature!
With a triple-core, it is possible to make the core-to-core connections all the same length, or at least close enough that that data movement takes the same number of clock cycles.
With a 4-minus-one core, the data paths will not be the same length across the "long" side of the triangle. Hopefully, in terms of clock cycles they will be the same.
I haven't RTFA or even looked at this chip's design, but there is also the issue of whether the original 4-core design was "2 2-cores glued together" or a real 4-core fully-interconnected chip. The 2x2 approach is a cheaper design but it has some nasty worst-case performance issues.
Knowledge is how to play a game, intelligence is how to win, wisdom is knowing what game to play.
When the 4th core is disabled, it is bypassed altogether. This allows for perfectly efficient 3-way communication.
I always thought SMP meant that all the processors are treated equally as far as available resources, and had nothing to do with the number of processing units available.
Despite both the summary and the article, it's a real 3-core chip, designed that way from the ground up, so I presume that the data paths are the same length. IIRC, somebody designed and sells a three socket mobo where all the data paths are also equal. (Ah, here it is: http://hardware.slashdot.org/hardware/07/08/13/1749213.shtml, a three socket Opteron machine with two PCIe slots and two Infiniband 4x ports.) I'd like to see a version for the Phenom 3-core CPUs; even better would be building some sort of Beowulf cluster using three of them, each using a pair of cross-over cables for the interconnects. That would give you one sweet 27-way cluster.
Nothing for 6-digit uids?
whatever, somebody just wake me up when we get to 42. thanks.
Why would CPUs have to be in 2^n configurations?
Engineering is the art of compromise.
thats triple treat. not triple threat. mmmmm.
This reminds me of the joke about the 3 dollar bill. Counterfeiters mistakenly make a 12 dollar bill, so they go to a rural state, like Idaho, to try to pass it off. Going into a store they ask for change. The clerk asks "would you like four three's, or two six's?"
Best regards.
Would someone tell me how this happened? Intel was the fucking vanguard of computing in this country. The Core Duo was the processor to own. Then the other guy came out with a three-core processor. Were we scared? Hell, no. Because we hit back with a little thing called the Core Trio. That's three cores and an fan. For cooling.
But you know what happened next? Shut up, I'm telling you what happened -- the bastards went to four cores. Now we're standing around with our cocks in our hands, selling three cores and a fan. Cooling or no, suddenly we're the chumps.
Well, fuck it. We're going to five cores.
It was first used for the early 90's Acura Vigor/Honda Accord. I wanna say 93 but probably 92 or 91 knowing my awesome memory. Beyond that, they also used it for a couple years in the Acura TL in the late 90's.
;-)
Next question please...
Perl - $Just @when->$you ${thought} s/yn/tax/ &couldn\'t %get $worse;
For about $60, I can get a dual-core 64-bit processor at something like 2 ghz. Maybe I wasn't looking in the right place, but the cheapest Core 2 Duo I saw was over $100.
Also, you're absolutely right that we should hope AMD doesn't get gobbled up. The current Intel stuff, it seems to me, is a direct result of AMD dominating the price/performance ratios for so long, and even, recently, doing well with performance/watt. So even if you don't end up buying AMD, having them as a constant threat means Intel will be forced to compete.
Don't thank God, thank a doctor!
..when more than 4GB's of ram will become the norm and software makers will be forced to make and support decent x86-64 ports. Give them 5-10 more years to make and support decent multi-threaded software.
AMD's multi-core processors use a fully-connected crossbar switch in the on-die northbridge to communicate. There is only one "hop" between each core.
What you're thinking of is a four-socket system whose interconnect network is not fully-connected - it's only the edges of a square, and there are two missing links between the "corners" of the square. That is certainly a legitimate topology for a four-socket system, with the limitation you pointed out (two hops to get to the opposite node), but it doesn't apply to AMD's quad-core die.
... Vista :)
http://www.rense.com/general79/wdx1.htm
Here's what's going on:
AMD has a process which can put X number of transistors on a chip.
One of their cores needs Y transistors.
A qualified engineer with years of training in advanced mathematic divided X by Y and got the number "3".
So... the chip got three cores.
Mystery solved!
No sig today...
Well, I just read hothardware.com for the *LAST* Time. Its clear, the editor should never has quit his job as a bad waiter.
TFA completely and totally misses the significance of a triple core processor.
The 3 core processor is announced as a budget quad core, but its really AMDs answer to the CoreDuo. Sun/Ultra Sparc already has 16 cores on their road map. ( and dual socket! )
There are two directions to go with a tri-core. Add a GPU for the forth core, and drop your pants ( lower the pice ) to compete with a dual-core+Integraged graphics or cheat/weld two tri-cores on one die to get a six-core to compete with Intels quad cores.
Although a lot of bad press went down from the 486sx diaster, Intel and AMD will probibly do someting like that in the future, because in 9 years, almost 6 generations have come and gone. Corporate america and the box box stores just want anything they can claim has some sensational advantage that they can milk at some certain price point. The enthusast market just isnt that big. Its big in the bucks, but not big in the overall market share.
Just like the day, the VP of CIS walked into our meeting, and the tech manager said in big bold words: "Compaq really has some great stuff rolling out this year." I could not get the airline bag to my mouth fast enough. I dont do Compaq.
I am no longer interested in watching Intel. They are not interesting. AMDs trick answers to intel ARE interesting.
> Despite both the summary and the article, it's a real 3-core chip, designed that way from the ground up,
And you know it is because...????
It isn't just hothardware that is speculating it's a variant of Barcelonas.
http://www.news.com/8301-13579_3-9780049-37.html
Personally, I think it's a good business choice for AMD.
It provides a number of benefits.
1> It generates some good press (At first I thought it was currently available from reading the article. It isn't. It's just being added to the roadmap for next year.)
2> They can get some utility out of the down-binned processors (ones that aren't able to get all 4 cores running at the specified speed, etc. for the quad-core, or that have a hard failure in one of the 4 cores)
3> They can use the product to hit price/performance points that they wouldn't hit otherwise (well, not without hurting their profits on quad-core) Possibly that may mean they even wind up with PhenomX3 parts that could have been quad-core, but just weren't tested on all 4 cores, as a test-time saving measure. Ex. Only test 3 cores, and if they're good, ship the part, cutting test time (and therefore production costs) by some amount. I believe Intel used this methodology on a number of Celeron parts - they had a huge volume of sales for Celerons because of price. I bet that for at least one of the versions of Celerons that was a downbinned Pentium at some point they said "Hey, we're only going to test these N wafers to see if they're good enough to be Celerons, so we can get more Celeron parts out the door faster"
> designed that way from the ground up
So what's the codename for the chip then? Not the marketting name.
Everyone has heard the codename of "Barcelona". And that's a quad-core chip.
What team of engineers worked on it / are working on it?
If you say it's the Barcelona team, I'd have to strongly disagree that it was a "ground up" design for 3 cores.
In theory with triple core, each processor is only 1 step away from the other processor (consider a triangular setup). With Quad core or greater there's either more bussing or more delays.
Without seeing further details I sincerely doubt that these are quad-core chips with one dud core. I suspect AMD has actually used their technical brains here and given us the fastest non-(overly)complex multi core setup.
Of course, if it's the bean counters in charge, then it's possible it's a failed quad core (though I still have doubts).
An old favorite: 640K cores ought to be enough for anybody.
... turning to the 3-D map, we see an unmistakable con
this story should be tagged "makinglemonade"
Platform advocacy is like choosing a favorite severely developmentally disabled child.
(n/t)
Does the extra space "left over" mean they can do an on-die GPU for cheap?
Is that part of their roadmap?
We do not live in the 21st century. We live in the 20 second century.
THANK YOU! Now finally I know what that song was about. Assymetric Multiprocessing, who woulda thunk it ...
So everyone's talking about how much pain AMD is in. Bleeding cash 24x7. So they've spent money on R&D for a 3 core processor!? Are you kidding me? Did they REALLY think there's gonna be a big market for three core computers!?
This seems like almost as bad of a decision as Intel made going with Netburst. The difference being Intel could afford to make a big mistake. AMD doesn't have that luxury, and their new luxury might be going bankrupt. Sure, Intel went with Netburst because it solved several technical problems at the time. But what problems does this solve for AMD? It seems like it would have been more cost conscious to design the 4 core, and if one core fails then just enable the 3 cores.
But seriously, what market is this really gonna be useful for? People generally are in 2 categories. Surf the net, check email, maybe some light gaming(in which case a dual core is plenty). Or a power user, playing some of the most advanced games in the world(in which case a quad core is what they buy). Where's the user that does both and isn't going to spring for a quad core, yet go buy those $50+ games every month? It doesn't make sense to me.
Selling me a 3-core-out-of-4 honestly, 'specially if the the whole core is shut down to draw no power, is better than the scam Intel pulled with the 486SX/487 A 486 was a chip with a floating point unit sufficiently dead (this is Intel, remember) that even they disabled it on die. This was no big deal, 'cause they were a bit cheaper than a "fully-functioning" 486. The scam was the 487. Coming from a time when it was too much real estate to put the FPU on-die with the Integer core (386/387 & 68030/68882, for example), external FPUs were common. The real scam was that a 487 cost MORE than a 486, and it was exactly the same silicon as a 486, just bonded out differently. When the "487" was plugged into the MB, the 486SX was disabled and everything was run in the 487.
I never was stupid enough to buy one, but stunts like that are why nearly all of my x86 boxes are AMD (needed a couple of Intels for testing on SMP, back when).
Will it run Linux ? ;-)
Everything I write is lies, read between the lines.
Reminds me of the 486SX. Basically a 486DX chip with a defective FPU, disabled, then sold. At least the early batches were, anyway. This is an excellent move by AMD. Somewhere in between dual and quad-cores at competetive prices, which I suspect would be somewhere closer to dual-cores.
The term symmetric refers to all the processors accessing the same memory and performing identical functions. Things like floating point units and graphics accelerators are examples of non-symmetric multiprocessing. See http://en.wikipedia.org/wiki/Symmetric_multiprocessing
The topic often comes up at meetings at VMWare, wouldn't it be nice to have 3 cpus? It would suit some of the types of load customers throw at our server products. I do not doubt that competing products like Xen would benefit in the same way from a 3 processor system.
“Common sense is not so common.” — Voltaire
I remember the early days of dual socket MBs. SMB always meant to me same clock frequency and same cpu revision, or else there would be bsod. The number of cores always seemed a non issue.
any idea if the disabled core can be rotated around the chip to allow higher over clock or better thermals ala moving holes in a semiconductor. this could be implemented in hardware i guess?
You are confusing cores and processor chips.
On AMD multicore - processor all cores are conencted via crossbar to one memory controller. there is NO hypetransport inside the processor chip between the cores.
The HT-link speed issue comes with MULTIPLE PROCESSOR CHIPS. Connections between processor chips is done with HT links and when there are more than 3 CHIPS then they cannot all be connected directly to each others.
I remember there was a 6-way Pentium Pro system circa 1999, where the processors were organized into two groups of 3 CPUs and each bunch was tricked by glue logic into thinking that the other bunch was the 4th CPU, so that the server would work as an SMP system. Neat trick.
Therefore I think in order to be a wholly x86-compatible SMP system, the computer must have an even number of CPUs (e.g. 2/4/8/12/16/24/32).
A 3-core system with ternary logic would interesting, however!
I agree with your crappy concurrency article (whichever way you parse that ;) but I also wonder whether it has anything to do with scientific computing. In that field people have dealt with multiprocessing for decades, I myself worked at CERN in 2001 and used a sensible language (F90) and compiler to utilize a dual x86 system. I don't see what the problem is, apart from marketing which says that multiproc didn't exist until Intel invented the core ;)
Escher was the first MC and Giger invented the HR department.
Just to add to my other post, if everyone thinks like you, then nobody will develop multiproc-aware software. IMHO a multiproc system is very useful even without concurrency in individual applications.
Escher was the first MC and Giger invented the HR department.
Why should they? The processors have very little interaction with each other, and if the hardware is properly done it shouldn't matter if you have 13 or 17 cores. The impression given is that after 2 cores jumping to 4 gives the impression that there should be 2^n cores, but basically that would be a good suggestion just to keep your cores rectangular. The problem is there are occasional flaws in the silicon and as such some of the processors will be broken. So all AMD needs to do is turn that processor off and run a three core system. Making money from the chip rather than nothing. A similar thing to what happened with SX and DX when the built in math coprocessors came out. The SX was the exact same chip but there was a flaw in the coprocessor so it was turned off.
Three core chips are the same as a four core chip where one of the cores processes data at 0 processes a second. There's no point in taking a hit when 3/4ths of the CPU is fine.
It is no longer uncommon to be uncommon.
I have been looking for one for awhile and figure this post would be a good place to ask :)
> Wouldn't it make sense to sell any part that had at least one working core?
... etc cores are non-functional and disabled. There will always be a market for devices with fewer working cores, as long as the pricing reflects it.
Indeed it would, and that strategy will make even more sense as the maximum number of cores per chip rises beyond 4. For an 8-core CPU, we should expect to see several versions sold in which 1, 2, 3
It becomes even more obvious that this is the way to go if you look ahead a bit. On a 64-core CPU in which one core has failed testing, should it be chucked away, or would it still be useful as a 63-core device? Clearly the latter.
This will be the norm in the years ahead.
"The question of whether machines can think is no more interesting than [] whether submarines can swim" - Dijkstra
I'm suprised I haven't seen anybody else mention it here today, just crap jokes as per usual.
:)
With 3 core processors they should generally be more effecient because each processor can talk to every other processor directly with less overhead compared to having something special to handle messages between them - or having one core pass messages to the other.
The same applies for 3 processor motherboards, clusters, grid computing - things are generally more effecient for message passing than if you had them in a square configuration.
I'm just suprised this isn't as popular today
You can do 4 objects and connect them all without oven using another layer. Picture a triangle with the other component in the middle. Connect every vertex to the middle. Make the traces to the middle zigzag a bit to even out the trace lengths, and boom, fully connected without any intersections. Not saying this is how things are done, mind you, but it is a silly argument to say three cores are good because they can be connected trivially. 3-core cpus are all about yield. Being able to sell components that had a flaw in a core, without reverting all the way down to a two core part (and by extension the two core price point), is important.
All that said, SMP has nothing to do with an even number of processors/cores. It just means each processing element of a system is roughly equivalent. So you have a choice of three parts to schedule something on, the scheduler can know all three are equally capable and the heuristics for processor selection are straightforward. ASMP typically has specific roles for each part (i.e. a dedicated processor for interrupts, etc etc)
XML is like violence. If it doesn't solve the problem, use more.
First off, you are right that the summary at least misunderstands SMP. Technically speaking though, AMD doesn't *technically* become NUMA until multi-socket comes into play, so it's fair to call a single-socket AMD system a SMP system. So for most home systems, AMD would be SMP if dual core, tri-core, quad-core, etc.
However, you could turn any SMP system into ASMP. ASMP can also refer to how the OS uses the processors (i.e. if one processor services and only services interrupts, it's ASMP). You could set the interrupt mask to point to all one processor, and use numactl to bind every process on the system to not hit that CPU. This isn't overly usefull, but you could technically claim ASMP then..
XML is like violence. If it doesn't solve the problem, use more.
Mod parent down: incorrect.
You could be called correct if the issue was "sockets", but not with "cores". All four cores on AMD's chips are connected to a full-speed, non-blocking crossbar switch, not to mention the full-speed L3 cache. The "hop" issue you describe is not an issue for the cores in a single AMD package.
I am a viral sig. Please help me spread.
I myself can't wait for the new V8 AMD chip. I hear it'll be the fastest production chip on the block. I can do burnouts with my processers. That wimpy 3 cylinder Intel wouldn't go faster than my golf cart. Anyone else see our future becoming this? I swear, computers and cars are eventully going to merge into one field.
From a marketing perspective you need to balance your offerings with target sale prices and yields. Obviously a 63-core part will sell for less than a 64-core part, however, the real-world performance may be similar enough that customers will prefer the 63-core part. In that case if your 64-core yields improve to meet demand you will end up selling 64-core parts as 63-core and lose the margin on the silicon.
There will be cases where there is enough difference between parts where it makes sense to create an additional offering (eg disable half for 32-core); but the assumption that a company would segment to each core isn't correct.
D6 63 0D 70 89 81 BB 8E 7B 7C 5F 5D 54 EA AB 73
http://www.m-w.com/cgi-bin/netdict?symmetrical
base word: http://www.m-w.com/cgi-bin/netdict?symmetry
The term suggests neither. Not that there are an even number of engines, nor that they are working on a single workload. The term suggests what it has always meant: that all processes/cores are available to run all processes, both kernel and user-space.
Ah no, you are sadly mistaken... Anyone that knows semiconductor technology, which you clearly do not, realizes thar defect density per wafer is THE largest concern when you're talking about large chip architectures like a quad-core CPU. It's ALL about yield, yielding known-good die at the right speed bins. You're kidding yourself if you think AMD isn't taking some of their quad-cores that don't quite make the grade and testing them out as triple cores, saving chips that would otherwise be rejected. Now, AMD CAN do this easily because of their architecture while Intel's 2+2 arch doesn't lend itself well to this currently.
Get informed befor you cast stones.... suv4x4... fan-boi? NAHHH.
but it could be a smart move.
consider the other guys(TM) offer slightly faster dual-cores. think of the *premium-price* the fastest cpus in a class can demand!
sell slightly slower 2-cores at bargain prices (think X2) and you loose.
consider a 3-core that costs you just slightly more to produce and you can easily demand the premium 2-core price or more because the chip is more powerfull. and (especially marketing-wise) 3 is greater than 2.
maybe it's not such a big act laying the cores out differently - amd has been talking of "modular" designs (for 'fusion', etc.) for some time.
Wrong again there suv... get a clue, please. It's not a separate architecture... Are you serious? Do you really think AMD would design a triple core chip? No, actually it's a PHENOM, hence quad-core but with only three cores enabled. And I assure you, some of the CPUs will be marked as triple-cores because they didn't make the bin. Some of course will be fully capable quad-cores under the hood as well... but this allows AMD to use their fallout, which EVERY semiconductor manufacturing process has.
I'm surprised this comment was modded up. Suv4x4, you clearly have no idea what you're talking about.
This is exactly what's happening. As a matter of fact, some of the "single core" chips AMD (and Intel for that matter) sells are dual core wafers where one of the cores doesn't work. Now that the native 4 core chips are being sold, you'll see the factory defects as triple core, or even dual or single core depending on how many cores actually work. Same thing happens with speed ratings. Minor variances and flaws in manufacturing affect the maximum clock speed of any given core. They're tested in the factory and dropped into speed bins. The ones that can clock the highest are sold for the highest price. The ones that don't make the cut are sold for less money at lower speed ratings rather than being thrown away. If you were running a chip company and you could sell some of your defects as downgraded parts or throw them away, which would you do?
Well, do give the comment submitter credit for having a website identifying himself.
This comment is actually a copy of one of his blog articles
Vintage computer adverts: http://www.vintageadbrowser.com/computers-and-software-ads
It would be nice if AMD used the die space for the missing 4th core for extra cache.
Suv4x4,
Why on earth do people like you get so riled up over this stuff, especially when you are some completely uninformed.
This is definitely AMD's way of making use of their quad-core yield loss, which is part of any manufacturing process. In fact, it's a very good efficient use of possible reject material that can now be sold as triple-core, something that Intel can't do so easily with their 2+2 quad core architecture. Now, the question is will the new triple core take off and can it be sold competitively versus dual-cores from Intel. If it fills a price/performance gap and is accepted in the mainstream, AMD will have a made a very good move by offering this to the market. Hopefully it won't just muddy the waters on them.
Be certain though, you are VERY wrong when you say this is a new Phenom architecture. It's not, it's a quad-core under the hood that has been marked as a triple core and either bonded out that way or a fuse is blown to disable that forth core... likely the latter.
So, in short, pipe-down son... pipe-down.
Wouldn't it make sense to sell any part that had at least one working core?
On the other hand, if we start seeing more than 8 cores, likely single core processors will pretty much be a thing to the past.
The yield of a 16 core processor with only 1 core functional is likely to be insignificant, to the point that it's not economic to try to sell them.
Let's say that 16 core processor is $320. That's $20 per core, so you'd likely only be able to get around $20 for the chip with one core operational. That's assuming you don't have to underprice them in order to get the economic crowd to not pay the extra $20 to almost double their performance*. Heck, there'd be a reason right there to bin them - They'll move up and buy a higher-profit duo-core instead.
At that point it might be cheaper to bin them, rather than to try to support chips that are less than 10% functional, and therefore likely to be hiding problems.
At $320, there'd still be quite a market for 4-8 core systems, hitting the sub $100 market, and the $150 market quite nicely.
*Don't forget that even for a bargain basement machine, $20 for increased performance wouldn't be much. You still have support components to consider. $400 for a '2 ghz' vs $420 for a '3.8 ghz' would have many bargain shoppers spending the extra $20, only the most penny-wise would buy the cheaper one.
I don't read AC A human right
In[1]:= Solve[2^n==3,n]
Solve::ifun: Inverse functions are being used by Solve, so some solutions may
not be found; use Reduce for complete solution information.
Log[3]
Out[1]= {{n -> ------}}
Log[2]
In[2]:= N[%]
Out[2]= {{n -> 1.58496}}
I intuitively estimated the value to be between 2^1 and 2^2.
Since 2^x is continuous for all values of x, 2^n has to be 3 at some value of n.
Not a single Beowulf Cluster joke yet. Damn whipper snappers.
My beliefs do not require that you agree with them.
i dont understand why 3 would be a magic number... the only thing i came up with is Nikola and his OCD, as 3 was his number if i remember correctly
*Sigh* Why do so many make this assumption, slashdotters should take a few business/industrial engineering courses to understand it's not as easy as just selling another part. Everytime you add a part to your line-up it costs additional money and resources to manage it. Each part may need it's own substrate design, test programs, software support, etc. It also becomes more difficult to manage what you build in terms of inventory and factory loading.
I mostly agree, though I'd note that we're talking about the same chips. There wouldn't be a different substrate design, test program, etc... They're the same chips, just with some non-functional parts disabled.
There will be cases where there is enough difference between parts where it makes sense to create an additional offering (eg disable half for 32-core); but the assumption that a company would segment to each core isn't correct.
I agree, my initial thought for a 64 core die was 4 core increments, with a matching decrease in the reliance on core speed as a metric. 64-60-56, etc...
My rule of thumb is that most people won't notice the difference until the performance is affected by more than 10%. So by that logic, an 8 core difference should be maintained: 64-56-48-40-32. Have two speed levels, that's 10 chips in your lineup. Add in phasing between chipsets, you're up to 20-30, of which 10 or so could be handled with a couple guys in a warehouse for the legacy support customers. Phasing: Cutting Edge-Mainstream-Legacy. People pay through the nose for the fast 64, slightly less for the slow 64, the slow 32 is the 'bargain basement' chip, the fast 32 a slight uprate, etc...
The mainstream ends up buying wherever the bulk of the production is. If 56 cores on average survive, that's where the sweet spot will end up.
I don't read AC A human right
If I have 2 CPU's, one of them always suffers because it is then in charge of context switching. If I have 3 CPU's, two to do the work, and one to monitor and distribute the work, I might have 2 "pure" CPU's doing the work without lag..
Hm, AFAIK, in a multiprocessor system, every processor/core runs its own kernel image and also does its own context switching and scheduling. The tricky part is more in deciding which process/thread will run on what processor and which processor will handle which incoming hardware interrupt. (Also, locks, mutexes, semaphores and the like suddenly get a lot more tricky to do right.)
If it's so secret, then how come I've never heard of it?
When you are talking about the volumes involved, it's not about just a couple guys in a warehouse. It takes a lot of work and planning to properly manage parts. Everytime you add more parts to the list it becomes more difficult to properly plan what to build. Will the customer want the high-speed 56 core or the low-speed 64-core? Most planning has to be done months ahead.
Again it depends on your yields. If you have good yields (in terms of cores) at the high end, it makes more sense to sell different 64-core speeds, than to canibalize those good 64-core parts and sell tham as 56-core to meet demand.
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AMD isn't going to tape out a new die specifically for three cores, that's a year's worth of work at least, and for what? There's no market gap there, people aren't chomping at the bit for something between a dual and a quad. They're using the quads with a bad core, same as they (and Intel) do with a dual core chip with a single faulty core. They electrically isolate it from the functional section of the silicon to prevent aberrant behavior and ship it out. It is just trying to recoup some manufacturing costs, that's all. A quad downgraded to a dual cost you twice as much silicon to make the same part, your margin sucks there. But if you can sell a triple at somewhere in between, you get a little more back. Intel doesn't do it because they glue two duals, the failed chips are downgraded to singles and shipped that way.
Multiprocessor systems were just expensive until the multi-core systems started, and multi-core is really more of a reaction to not being able to crank up the GHz any further. I know you mean it tongue-in-cheek, but it really does make a little bit of sense ;)
/me pets his old 200MHz dual PPro...
My blog. Good stuff (when I remember to update it). Read it.
Actually, I got interrupted when I posted the above post. My point was; are these three core processors just a 4 core with one bad processor; a way of using failed 4 core processors? I would think so.
Best regards.
With disabled cores, you are creating lower cost parts. Therefore you need to start balancing all the costs, it doesn't make sense to use the same expensive piece parts to support a lower selling price CPU. You will want to use a simpler (and cheaper) substrate, use less capacitors for power delivery, cheaper heat spreader (since there will be less heat to disipate), and with such design changes most likely test program changes will also be needed.
Thing is, we're not talking about cores that are just disabled. We're talking about disabling cores that are flawed/nonoperational from the manufacturing process. You have to reach a certain manufacturing point before you can even tell this, so like the celeron chips that still had the cache(just disabled), the components are still there. You might be able to get away with a different heat spreader for the really low line chips, but remember the supply chain - offering more products does indeed present more costs, but so doesn't handling more supply components and materials. A slightly less capable but cheaper heat spreader might not be cheaper enough to be worth the hassle of stocking it, just stick the better one on all chips.
Besides, we're talking more about a salvage operation here.
Again it depends on your yields. If you have good yields (in terms of cores) at the high end, it makes more sense to sell different 64-core speeds, than to canibalize those good 64-core parts and sell tham as 56-core to meet demand.
Oh, agreed. I was just giving examples. If you're getting good yields, depending on architecture it might make more sense to rate them by speed differences, discarding chips with failed cores.
When you are talking about the volumes involved, it's not about just a couple guys in a warehouse. It takes a lot of work and planning to properly manage parts. Everytime you add more parts to the list it becomes more difficult to properly plan what to build. Will the customer want the high-speed 56 core or the low-speed 64-core? Most planning has to be done months ahead.
When you talk about the volumes involved, having 30 parts would be nothing. There are companies that market tens of thousands of different parts. Look at a company like Bosch for their electric motors alone. When I said Legacy, I meant stuff like the people still selling 386/486 chips today for special purposes.
I don't read AC A human right
Oracle currently counts multi-cored CPUs at 1/2 license per core. I wonder whether a three-legged CPU is going to cause problems with applications that utilize a similar scheme.
Coulden't resist :)
Hm, AFAIK, in a multiprocessor system, every processor/core runs its own kernel image and also does its own context switching and scheduling.
The operating systems usually run on desktop MP computers (Linux, Windows, MacOS X) have a single kernel image with data structures protected by locks or other mutex constructs.
>*Sigh* Why do so many make this assumption, slashdotters should take a few
>business/industrial engineering courses to understand it's not as easy as just
>selling another part.
Stef? Is that you?
hawk, who doesn't believe he's ever seen a call for more PHB's on slashdot before . . .
It seems you're wrong (see other comments in this thread). I hope in future you won't be so quick to over-react and make yourself look silly.
Out of interest, where did you get the idea that the Phenom Toliman was a 100% new architecture distinct from the rest of the Phenoms?
"Nine times out of ten, starting a fire is not the best way to solve the problem." - my wife
Doo dooo, doo-doo-doo!
---GEC
I'm but the humble pupil, seeking to snatch the scratchbuilt pebble from the master's fully articulated hand
Honestly, the third core doesn't count for much, when you consider the cache impact of all that extra processing... What makes these new processors special is their creamy liquid center...
---GEC
I'm but the humble pupil, seeking to snatch the scratchbuilt pebble from the master's fully articulated hand
That was very insightful. It was almost as if you read the summary.
It's a 2 core processor where they accidentally made it with an extra core, and they will be selling these mistakes for cheap. Everyone benefits!
“Common sense is not so common.” — Voltaire
First, from a design standpoint is it feasible to disable cores? It's not trivial to create a multicore design where you arbitrarily disable X cores. For example for the 64-core example, there are 64 different configurations of a 63-core processor possible if 1 is bad. More likely as is done with cache and other designs the overall processor would be segmented in such a way that you have 2 or 4 configurations (lose half or 1 quarter of the cores if 1 core is bad).
From a yield standpoint, if you have a poor performing 64-core process you are in trouble as you are wasting a lot of silicon to make a high end part, if you have a great performing 64-core process you will not have the volume of "partially good" to justify the resources to support managing additional parts.
The third area is target market. Each product created should have a specific market it is going after. If you sell 64-cores @ $640, it doesn't make sense to sell 63-cores @$630; the market is the same for the two parts, it's just costing more to support different products.
Also, there may not be a market for a low end product with similar configuration as high end (eg 32-core made out of 64-core). The 32-core market may be looking at smaller form factor, lower, power, etc. which cannot be supported by making the part out of high end silicon.
The best example is GPUs, which are already going though this. They already have silicon with 24 cores, and rather than segmenting in multiple ways, they typically have 2 configurations - a fully enabled & 75% enabled. They already build specialized products for the low-end market, so 50% enabled or less doesn't make business sense to support.
30 parts can mean managing tens of thousands of BOMs, depending on different die stepping, piece part manufacturers, shipping configurations, customer requirements, etc.
To my original point, from a business standpoint it's not as easy as many people think to create new configurations for the same silicon. As chip prices drop and parts become more specialized, there just aren't sufficient markets to support having a wide variety of core-configurations of the same silicon.
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Desktop schmesktop. I've always wondered why people call it according to its placement rather than its function (e.g. workstation). We should really start by asking why you need more than, say, a 500 Mhz P3 for 'desktop' stuff like web, email and office. Most of today's single CPU machines are underutilized anyway, which is why I keep things like BOINC running to get something useful done instead. It's relatively rare that an interactive process is CPU-bound, but for those times it often helps to have multiple CPUs, even if not fully utilized. For example transcoding between different media formats, where you have decoding and encoding processes. I don't have much hands-on experience with multiproc machines, so I can't tell about interactive latencies (where, supposedly, UI threads running on their own CPU make things more snappy).
Escher was the first MC and Giger invented the HR department.