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IBM To Produce Copper Alphas For Compaq
LinuxGeek writes: "IBM will be producing copper interconnect Alpha CPUs. The samples are already running 1.2GHz. Hopefully they can make them cheap and plentiful."
Similarly, sokoban
writes:
"News.com is reporting that IBM is planning to manufacture Copper Alpha
CPU's. Now that is a fast piece of equipment. Here is the
link." And nobody ever got fired for buying ... err, Alphas. Soon, 32-bit will seem so quaint, eh?
DCG Inc, now owned by Atipa would sell alpha mobo's with processors stuck in their special tower case but otherwise empty. www.dcginc.com
Alphas have always had a special ATX RF plate, they take ATX PS's but some need 630W units. So, you probably want to get the case...
Yes, these things will totally kick ass, but if you use gcc and glibm it would be like running 80 octane gasoline in a Corvette. This is a brand new architecture that the gnu development is years behind on. Compaq has compilers, libraries and prebuilt apps that run _much_ faster. I don't think anything has been done to gcc since the EV5 architecture.
The Compaq tools are mostly available for free, but you can't compile kernels with them. We're trying to catalog what can actually be compiled with them but most Linux system source assumes that you are using gcc. Sad, really. I'm sure that things would run much better when using a compiler that actually knows how many execution units the processor has...
So, on another note, anyone know of anyplace (on the web or otherwise) that I can find out exactly what IS up with BIG_ENDIAN and LITTLE_ENDIAN? I'm not going to be using a BIG_ENDIAN machine anytime soon, but I've always been interested.
Do you want the literary reference from which the names are taken? (Swift, _Gulliver's Travels_, Book 1, "The Voyage to Lilliput". There were two tribes of Lilliputians who were fighting a war over whether one should eat one's breakfast egg from the big end (the Big-Endians) or the little end (the Little-Endians). I never can remember which tribe Gulliver was allied with, so don't ask me.) Or do you want the technical explanation of why Intel puts the bytes in a word "backwards", so that you can't read the characters in a UCS-2 string from the bytes? (It turns out that arithmetic operators cost half as many transistors/operator if the bit order goes from lowest-order bit to highest-order bit, as in an Intel chip, than they do if the bit order is highest-order bit first. It doesn't make all that much of a difference any more, since the transistor count on the ALU is only a tiny fraction of the cost of the chip, but in the old days, it mattered very much indeed. I can't ever remember which tribe I'm allied with, so don't ask me.)