Nanoscale Ion Beam Lithography

Nevyan writes: "A group of researchers from the University of California, Berkeley are developing a device to carve patterns for microchips. They are using a method that creates a much smaller path with less distortion than traditional methods. They are trying to aim for a width of 50 nanometers for placing the maximum nuber of transistors. http://enews.lbl.gov/Science-Articles/Archive/mask less-chips.html"