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Buses and Interconnects: The Next Generation
mkarpinski writes "ExtremeTech has posted a nice overview of the next generation of peripheral buses and interconnects including PCI-X, InfiniBand, 3GIO, and HyperTransport. From the article, "All these future interconnects and buses have a few things in common. They use packet-based, point-to-point connections; in fact, InfiniBand implements a full switch fabric. They provide bandwidth in multiples of that offered by PCI. They decrease latency significantly, with HyperTransport and RapidIO showing the most dramatic decreases, crucial for their target communications and embedded markets. And all four strive to reduce pin counts in order to conserve power and system real estate." Open the floodgates!"
If my memory serves (occasionally it does) PCI-X has been "on the drawing board" for, what?, the past 5 fricking years?
Quick with the acronyms, slow delivering anything useful...heck not delivered anything yet from what I've seen.
3GIO, Infiniband and Hypertransport...remains to be seen. But at least there is a 1 out of 3 something showing up and relieving these "low bandwidth blues".
Isn't Hypertransport supported by the AMA?
whoops, acronym abuse...Apple, Microsoft and AMD?
Seeing as Hypertransport is AMD's brain child.
We'll see, but it winds up being a matter of "the chips falling where they may", especially in the hands of motherboard makers, where they belong.
Whoever comes out with an actual working spec could say "Get on the bus, come ride with us" in a commercial and not be referring to city transit.
(can you tell I want to go home an hour early?)
If it is not on fire, it is a software problem.
This article misses one crucial standard: PCIX 2.0. While not highly publicized it has some key features that make it more likely to show up in high performance systems that 3GIO. The PCIX 2.0 standard is due to be finalized at about the same time as the 3GIO standard will.
One should not theorize before one has data. -Sherlock Holmes-
...the intelligent switching of devices on the bus. Having a packet-switched bus controller is important (and I've worked on the design of an Infiniband controller so it can work), but even having the application passing parameters to the bus controller is important. For example, should a network card in a workstation take priority away from the video capture card?
Consequence to the capture card: dropped frames, necessitates recapture.
Consequence to the network card: dropped network packets.
Bandwidth is important, but again - the application must drive the necessity for the bandwidth. Intelligent switching and caching in addition to the increased bandwidth are necessary.
ALSO, one important point - architectures such as HyperTransport are essentially point-to-point, so you need multiple HyperTransport interfaces per switch IC - something that will drive the costs up. Hopefully low-speed devices can all be dropped on the 1394b or USB2.0 buses and then those can be handled through specialized south bridges on PCs, for example. For high-end network apps, obviously the switching of multiple buses leading to optical driver modules is basically the application itself.
You're losing it :)
Actually, the world is moving to a fabric-based interconnect rather than a bus-based one. RapidIO and Infiniband (and Sky and Race for the embedded world) all techincally support only one slot, too. And that one slot goes to a switch, which connects to other slots and all your other resources. Ideally, each processor would get its own connection, and maybe some memory would, too. That way, processor #1 can talking to the video card to play quake, while processor #2 serves up data from your hard drive to the LAN, while data goes directly from your HD to your DVD burner... all data takes a separate path and operates at full speed - no need to time multiplex, like with a bus.
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