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Intel Cites Breakthrough In Transistor Design

n3hat was one of many who wrote in to tell us about the following: "Saw this report in Siliconvalley.com, 'Intel has devised a new structure for transistors that could lead to microprocessors that run faster and consume less power than conventional ones. The technology solves two of the more intractable problems: power consumption and heat.' It goes on to say that Intel plans to present two major elements of the new "TeraHertz" transistor structure at the International Electron Device Meeting in Washington on Dec. 3.

18 of 255 comments (clear)

  1. Oh Yeah? by big_groo · · Score: 3, Funny

    "To compare, it would take a person more than 15,000 years to turn a light switch on and off a trillion times."

    Well, I bet *I* can do it in 11,000 years!

    Any takers?

  2. Yeah, yeah... by rabtech · · Score: 5, Insightful

    Every other month someone comes out with a "breakthrough" in microprocessor design that could "someday lead to smaller and faster chips" that "use less power."

    I am not blaming only Slashdot for presenting this kind of fluff, I blame the major news organizations as well. Until these companies are getting ready to ship a product, I don't want to hear about it, because so much if it becomes vaporware. What little is left ends up being only slight improvements wrapped in marketing buzzwords.

    Give me more content and less fluff please.

    --
    Natural != (nontoxic || beneficial)
    1. Re:Yeah, yeah... by Compuser · · Score: 5, Insightful

      No, Intel basically dropped the bomb and announced
      that they have achieved the holy grail by finding
      a better insulator than silicon dioxide and they
      claim this new material is "manufacturable", which
      I take to mean "fits within current process without
      too much investment". If true this is a fundamental
      thing and not at all fluff.

    2. Re:Yeah, yeah... by rnd() · · Score: 3, Insightful

      Maybe /. should have a category (who knows, they may have one already) for tech press releases and the like.

      But seriously, is this really that bad?

      --

      Amazing magic tricks

  3. Amd? by Spackler · · Score: 5, Funny

    It goes on to say that Intel plans to present two major elements of the new "AMDhurtz" transistor structure at the International Electron Device Meeting in Washington on Dec. 3.

  4. This seems a bit mundane... by frank_adrian314159 · · Score: 4, Interesting

    After all, SOI technologies are not new and people have been trying different gate insulators forever. The problem with alternate gate insulators has been cost for yield. Unless this has also been solved and this process gets moved into fab, it's just another research lab thingee.

    Must be a slow news day for nerds...

    --
    That is all.
  5. Oh wow, less pwoer and less heat? by AugstWest · · Score: 4, Interesting

    That's AMAZING, they announced that?

    What's next, a means of DOUBLING HARD DRIVE SPACE? Maybe someone soon will announce they've figured out a way to make screens BIGGER and CHEAPER....

    It amazes me some of the stuff that slashdot rejects when compared with some of the stuff that gets posted.

    I submitted something over the weekend about someone at indymedia.org who was detained at an airport and questioned aboput posts he'd made to a web discussion group under a pseudonym.

    Yes, that's right, he was pulled aside at an airport and they not only knew exactly who he was, but his nick and specific posts he'd made.

    Seems to scream "YRO," but hey, we gotta make space for stories about bigger hard drives and faster, cooler processors that may see the light of day eventually.

    The story is here, btw.

  6. IBM and AMD First by sabinm · · Score: 5, Informative

    NPR had a report on this eariler today regarding this
    "Terahertz" chip. It seems both IBM and AMD had developed this technology and Intel snubbed it, citing that it was to expensive to implement. There is nothing breakthrough about "fast switching" electrons, just the fact that INTEL released a press story about it makes it interesting. Ho hum

    --
    http://cincyboys.blogspot.com/ Everything Cincinnati. Including the word 'Finnih'
    1. Re:IBM and AMD First by router · · Score: 4, Informative

      Also, those of us who remember when IBM announced its desire to use SOI and Low-k dielectrics and Intel snubbed them are now giggling like schoolgirls....

      Check EETimes for the whole unabridged story.

      http://www.eet.com/story/OEG20011126S0031

  7. Improvement not limited to processor. by rice_burners_suck · · Score: 5, Insightful

    OH WELL.

    I was impressed by the idea of Transmeta's Crusoe processor because it greatly reduces the increasingly complicated problems of heat and energy efficiency. However, I've heard rumors that their product isn't getting widespread acceptance for some reason. Perhaps speed or reliability. Who knows.

    The point is that we desperately need processors that produce less heat and use less energy. If you take a moment to think about it, it's totally ridiculous that we need so many noisy fans inside a computer that someone's using to compose an email. It's even more ridiculous when you consider that some graphics processors require a fan as well, and so does the power supply.

    If successful, Intel's breakthrough in transistors could solve or greatly reduce these and other problems. These solutions aren't limited to the processor! All the chips in your computer contain transistors. Reducing the size, heat and energy usage by tiny amounts in each transistor will yield enormous benefits. Suddenly, a fan won't be required on the main processor or the graphics processor. Look at how much energy you save, not only in the transistors themselves, but in removing the fans, which themselves need energy to remove the unnecessary heat! It may be possible to remove the fan altogether from the power supply, resulting in less noise and even less wasted energy.

    Now if only they'd come up with a breakthrough that will make fast, long lasting, solid-state hard drives a reality. Then the computer will be silent and use much less energy yet. We're getting there. It's only a matter of time and money.

    OH WELL.

  8. Re:Dielectrics by Erich · · Score: 3, Informative
    One of the reasons you want a high-k layer is for making micro-capacitors to minimize ground bounce.

    One of the big problems with current chips is that voltages are getting so low and current is getting so high, and with clock gating to turn off things that don't need power you get the inductance of wires causing a lot of ground bounce, which can be really bad. So you want to add capacitance to offset the inductance, but there isn't really a high-k layer in most processes to make capacitors out of.

    --

    -- Erich

    Slashdot reader since 1997

  9. You're using the wrong computer. by Christopher+Thomas · · Score: 4, Interesting

    The point is that we desperately need processors that produce less heat and use less energy. If you take a moment to think about it, it's totally ridiculous that we need so many noisy fans inside a computer that someone's using to compose an email.

    If you're using a high-end computer solely to compose email, I'd argue that the problem isn't the hardware.

    Heck, if power is a concern, buy a Dreamcast and use the web client to access Hotmail. $50, and you get a low-power embedded box that you can read and write email and even play games on.

    Desktop systems are overpowered because people want to be able to run insanely high-powered applications on them, no matter how much of a waste this is when they're not playing Quake XIV.

    It's even more ridiculous when you consider that some graphics processors require a fan as well, and so does the power supply.

    Same thing. A real-time realistically rendered 3D environment requires one hell of a lot of computing power to generate. This means heat. If you're just answering email, buy a PCI Rage XL card and save on the fan and heatsink.

    Now if only they'd come up with a breakthrough that will make fast, long lasting, solid-state hard drives a reality.

    They're called "flash cards".

    If you want to store gigabytes of images or gigabytes of game install files, however, they won't be sufficient.

    RAM is harder to make per unit storage space than a magnetic platter. This is just the nature of the universe - RAM is intrinsically more complex. A magnetic platter is just a flat surface with the right kind of coating; it doesn't get much simpler than that. You can buy a solid-state drive off the shelf right now, but the the cost will reflect the fact that it's harder to build, and this will continue to be the case for quite a while.

    In summary, the problem isn't the technology, it's the fact that people *want* insanely powerful computers, with large amounts of storage, for the lowest price that still gives them the power and space they crave.

    1. Re:You're using the wrong computer. by markmoss · · Score: 3, Informative

      Do you have any idea what it takes to get the surfadces flat enough? How long it takes to design a coating, and what sort of processes it takes to apply it?

      It's not easy -- but it is a bulk process, and once you get a smooth layer it's done. Modern chipmaking requires first an almost perfect silicon crystal something like 12" across, sliced and polished into wafers flatter than a magnetic platter. Then you add an even more precise and even coating of etch resist, expose it to UV light through a mask, then precisely etch it at submicron line widths. Repeat coating and etching several times, interspersed with other difficult to control processes like planting dopants. Chipmaking is bound to be more expensive...

      Of course, magnetic disk drives also have a high fixed cost (motor, bearings, head positioners, etc.), so the ability to make higher-capacity drives without raising the price doesn't translate very well into making the same capacity drives for less. So the price will probably never drop below $50, and you should be able to get at least 64MB of solid-state disk for less. That's so big that under DOS 3.3 you have to partition it into two logical drives. 8-) Get rid of the bloatware, don't use inherently large data files (audio, video, or many still pictures), and maybe solid-state disks would be cost-effective.

  10. Okay, now what about gate delay? by Erich · · Score: 5, Informative
    We expect that transistors keep getting smaller, and faster about the same rate as they get smaller. Gate delays are (looking out 5 to 10 years) not a big worry.

    The big worry is wire speed. Wires aren't getting much faster, even though dies are getting larger and clock frequencies are getting faster. It used to be that getting from point A to point B on a chip was no problem to do at the end of a clock cycle. Current processors are getting to be so fast that you can't get from one place to another in a whole clock cycle in some cases. Unlike transistors, wire delay gets worse as size gets smaller, because resistance goes up fast (scales with cross-sectional area), and wire delay is proportional to R*C. You can do some tricks to keep wire speed the same, but relative to switching speed and transistor size it still gets bad quickly.

    Routing information around is the problem of the future. You get free computation on the way, but getting from point A to B is the hard part.

    That being said, fast-switching, low-power transistors are nice. :-)

    And, for all you patent-ballyhooers, Intel will patent this (probably). As they should. Other companies will license this patent from Intel in the same way that Intel licenses patents on other aspects of their processes from other companies. That's the way things work.

    --

    -- Erich

    Slashdot reader since 1997

  11. Partially Depleted and Fully Depleted SOI by pm · · Score: 4, Insightful

    There is a mroe technical article over at EETimes.Com here:

    http://www.eetimes.com/story/OEG20011126S0031

    The following is based on my prior research into SOI and the EETimes.Com article that I cited, and not on any knowledge of what Intel is actually planning on doing. I have not read the IEDM presentation and have no inside knowledge of the details of Intel's SOI plans. I am not speaking for Intel (despite working there) and I may be wrong on the details. My purpose in posting is to give some details on the background of SOI.

    There are three parts to this: this uses fully depleted SOI vs. the current partially depleted insulators, this uses a high-K dielectric (zirconium oxide, according to the EETimes) vs. traditional dielectrics, and this uses thicker source and drain terminals to offset the increased resistance from fully depleted SOI.

    Conventional silicon wafers use essentially a large, somewhat thick circular chunk of silicon as the starting platform that transistors are then created on top of. SOI is "Silicon On Insulator" and refers to a type of silicon wafer in which there is a somewhat thick chunk of silicon that forms the bulk of the wafer, on top of this there's a relatively thin insulator (referred to as the bulk oxide) and then on top of this a new layer of silicon is deposited (referred to as an epitaxial silicon layer, or epi layer). The transistors are created on top of this epi layer.

    The only physical difference between fully depleted and partially depleted SOI is the thickness of the layers. Partially depleted uses a relatively thick layer of insulator followed by a relatively thick silicon layer. Fully depleted uses much thinner layers. The names come from the fact that the depletion region on fully depleted SOI reaches down all the way to the bulk oxide whereas in the partially depleted SOI, the depletion region ends and there is still some non-depleted silicon between the bottom of the transistor and the bulk oxide. To explain exactly what depleted silicon is would take some diagrams and some time. Suffice to say (and this is not debated in the industry, it is a fact): fully depeted SOI is better than partially depleted.

    So why do people use partially depleted? It's a matter of complexity. Fully depleted SOI requires extremely tight manufacturing margins. You need to have very precise thicknesses to achieve the advantages that fully depleted can offer over partially, and this precision results in much higher cost. People (like myself) say that SOI is expensive, but this is in reference to partially depleted SOI which is the most common in use nowadays, fully depleted is quite a bit more expensive than even this. There is also concern that wafer manufacturers may have problems supplying high-quality, fully-depleted, completely planar (flat) SOI wafers in high volumes.

    Switching to SOI reduces a form of leakage called subthreshold current (or Ioff) that occurs when a transistor is supposedly turned off. Fully depleted reduces this leakage even more than partially depleted. If you think of transistor current as being water that flows out of a water faucet depending on a signal (in this case the tap/handle of the faucet), subthreshold leakage is the equivalent of a leaky faucet that runs even when it's supposed to be off. It also has other benefits (it's faster, packing density is improved, etc.).

    The other primary form of leakage is something called gate oxide leakage that is current that tunnels through the increasingly thin region that separates the gate from the channel of the transistor. If we go back to the faucet metaphor, it would be like the faucet sucking water out of your hand while your hand is on the tap. :) Gate leakage is a function of oxide thickness, and I discuss this in another post of mine in this thread. The thicker the oxide, the less likely it is that electrons can tunnel through the gate. But if you increase the oxide thickness while leaving everything else the same, you lose performance since the capacitance of the gate is reduced. So what you want is a way to maintain a value of gate capacitance while increasing the thickness of the gate. The easiest way to do this is to switch to a material in the gate that has a higher dielectric constant. So, the high-K dielectric tackles the other part of leakage by allowing higher thicknesses of dielectric while maintaining a given level of performance.

    The third "new thing" offsets a disadvantage of fully depleted SOI - higher channel resistance. By increasing the thickness of the contacts of the source and drain you can reduce the resistance going into the transistor and can partially offset the increased channel resistance.

  12. Priceless Quote by alexburke · · Score: 3, Funny

    To compare, it would take a person more than 15,000 years to turn a light switch on and off a trillion times.

    Wow! That really puts things into perspective...

  13. Must be a new quarter... by ackthpt · · Score: 3, Insightful
    It seems about every three, or so, months something on the order of a new transistor technology comes along from IBM or Intel. Prior links:

    IBM Develops Transistor Capable of 210GHz, June 25 2001

    Intel Claims Smallest, Fastest Transistor, June 6 2001

    Single-Atom Transistor, Mar 8 2001

    Intel Claims 10Ghz Transistor, Mar 4 2001

    Intel Creates 30-Nanometer Transistors, Dec 10 2000

    I predict in the next couple weeks IBM, or someone else, will announce a smaller, faster transistor which slices, dices and scrambles eggs in the shell, leap through flaming hoops and balance your checkbook.

    --

    A feeling of having made the same mistake before: Deja Foobar
  14. TWO of the more intractible problems? by jd · · Score: 3, Informative
    Since heat is a product of power consumption (energy in = sum(energy out)), then solving one is solving the other. In other words, there is only one problem, not two.


    The basics, though, are simple enough. Both reduce to the problem of moving electrons through a medium, with minimal impedence, whilst still having a semiconductor. (ie: You can't just stick the whole thing in liquid helium, and hope that you can have a superconducting chip.)


    The ability to use gallium-arsonide with very fast VLSI chips, as described a while back, is a good step in the right direction. Using copper, rather than alumin(i)um is another, although silver would be superior.


    Another option might be to use non-flat architectures. A hemsphere would offer a greater radiating surface and offer much shorter connecting distances than a planar chip, although it would be a royal pain to actually build something like that. Since power consumption is a function of distance travelled, you would thereby reduce the power requirements.


    Another consideration is the differences between states. If you need to switch from +1 volt to -1 volt, then you've got a 2 volt potential difference. (Duh!) The smaller that gap can be made, the smaller that PD is, and the less power you consume in the process. The drawback is that outside sources can cause serious problems. You would need some decent shielding, and a reasonably clean power supply to get away with very small changes.


    Last, but by no means least, one of the worst culprits for power loss are connections. And modern CPUs have LOTS of them! Every single pin has three points in which you have the potential for high resistance - the connection between the socket & the pins on the chip, the pins & the gold wires connecting to the chip itself, and finally between the gold wires and the chip.


    Of these, by far the most likely source of a poor connection is between the socket and the pins. That connection will often be by simple soldering, so you've got the double blow of going from the alumin(i)um pins to a lead/tin mixture, and then from the mix to the alumin(i)um connection on the socket.


    Overall, it's a wonder modern CPUs ever work at all!


    (Actually, it's slightly worse than I'm describing, as chip manufacturers frequently split things between multiple chips, thereby doubling all the above problems, for each chip in the set. ie: 4 chips give you 16 times the headache.)


    Larger dies, fewer pins (how many do you need, for chrissakes! One per instruction?!), uniformity of materials (as far as possible), fewer chips per set, better screening, better PSUs, purer wafers, and less corner-cutting, would all lead to superior performance, in every respect.


    The main reason Moore's Law will last well into the 22nd Century is that, although ALL of these refinements could be implemented tomorrow, the cost/profit ratio isn't great, and one press announcement is pathetic compared to the free publicity of "ever more exciting discoveries" (which aren't).


    In short, why the hell SHOULD Intel, AMD, et al, make the best chips the can? What possible motive could they have for killing off a great revenue source at little effort, when the alternative would be a one-off mediocre improvement in sales for gigantic effort, followed by a massive slump? The rate of R&D is much too slow to keep supplying people with new toys. It's much more profitable to slow the rate of marketing, and keep people tagging along.


    (If a chip manufacturer wanted to destroy the technology industry, all they'd need to do is make the best product they possibly could, using the best tools, and never mind the rejection rate. You'd get a few days of massive buying, followed by a decade of stagnation.)

    --
    It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)