Slashdot Mirror

← Back to Stories (view on slashdot.org)

Anyone Using JHDL for Programmable Logic?

Posted by Cliff on from the describing-hardware-using-coffee-derivatives dept.

gte910h asks: "I am an embedded developer who is learning how to program programmable logic devices (CPLD's and FPGA's). I have looked at VHDL and other Hardware Description Languages, but they seem so obtuse compared to C or Java. Has anyone tried any of the tools based off of general purpose programming languages, like JHDL. Do they work as well as VHDL and other HDL's? These would make things this type of development acessable to more people if they work well enough." Are packages similar to JHDL available for other languages?

2 of 153 comments (clear)

  1. gte910h, you have a long road ahead of you by Anonymous Coward · · Score: 0, Flamebait

    "but they seem so obtuse compared to C or Java."

    French seems pretty obtuse compaired to English, but then again I ONLY SPEAK ENGLISH! Maybe what you question should be is "I'm too fucking lazy to actually learn anything, and I'm afraid of things I don't understand. I don't want to learn anything new or difficult, just something similar to what I already know."

    With a shitty attitude like yours, it's no wonder the world is heading to the crapper. The fast & easy way is the best way - bullshit! But a little work into something and learn something that seems "obtuse." You might surprise yourself. But more likely, you'll give up because you're a shiftless piece of shit and you'll leave the difficult innovations up to other people.

    You make me sick.

  2. stick with Verilog and VHDL by spatula · · Score: 0, Flamebait

    Verilog and VHDL are both excellent hardware description languages. The syntax may seem obtuse at first because you are expecting them to be like programming languages. In a programming language, you describe a set of mostly sequential operations. In a hardware description language, you describe several blocks of hardware all operating in parallel. Obviously the syntax of an HDL is going to need to be a little different from your average programming language.

    If you use either VHDL or Verilog, you will have plenty of choices for compilers, simulators, and synthesis tools. There are many books available that will help you learn these two languages. You will have access to excellent usenet communities at comp.lang.verilog and comp.lang.vhdl. If you only learn JHDL, you simply won't have so many choices.

    I recommend learning one of the big two first. I think you will find that both Verilog and VHDL will meet your needs. I can't tell you which to choose, since I don't want to start a VHDL vs Verilog flame war here. I recommend checking out some of the VHDL and Verilog models at http://www.opencores.org and deciding for yourself which syntax you prefer.