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Intel's Answer to AMD's Hammer - Yamhill

bdolan writes: "Today's San Jose Mercury News is reporting that Intel is going to put a 64 bit architecture extension in upcoming Pentiums if it turns out the Itanium doesn't take off. Hmm. Apparently they intend to only turn this on if AMD's 64 bit processor make major inroads against the Itanium architecture. Aren't we glad that competition is keeping everyone on their toes."

8 of 544 comments (clear)

  1. Uhh..naming? by Mahtar · · Score: 5, Funny

    AMD Guy: Hehe..check out my incredible new processor. It's called the Hammer! What do you have in your box?

    Intel Guy: Oh..er..I have a *unintelligible*

    AMD Guy: What is that? Mumblican? Speak up!

    Intel Guy: *coughYamhill*

    AMD Guy: YAMHILL? Buwhahahahaha! Intel marketing loves you!

    Intel Guy: *cry*

    1. Re:Uhh..naming? by djoham · · Score: 5, Informative

      There actually is a basis for this name. Intel has a large presence in the state of Oregon and has a tendency to give their products code names from that state.

      For example, there's the Willamette (a major river, incidentally one of only a handful in the world that run south to north), the Klamath (a county) and the Deschutes (another county and also a national forrest).

      There may be others, but they don't come to mind at the moment.

      As a former Oregonian, I find this kind of cool...

      Best regards,

      David

    2. Re:Uhh..naming? by suss · · Score: 5, Funny

      There actually is a basis for this name. Intel has a large presence in the state of Oregon and has a tendency to give their products code names from that state.

      I can't wait for the beaver... all 64 naughty bits of it!

  2. Other Links by 4of12 · · Score: 5, Insightful


    This has been the focus of some stories at the Inquirer as well.

    Personally, I thought that Intel would have been in a good position to just relabel the Alpha 21364 as IA64 and be done with it.

    --
    "Provided by the management for your protection."
  3. Yamhill by sben · · Score: 5, Informative

    For those who care, Yamhill is a small town WSW of Portland (the little red star at the lower left).

    Fascinating info can be found at cityofyamhill.com, naturally.

  4. Intel naming. by Anonymous Coward · · Score: 5, Funny

    I am laughing at there choice of the yamhill river for the naming. I live about 3/4 of a mile from the river. They find two headed fish in it, I don't even want to know what will be found in the intel processor.

  5. This is bad news for Intel by bhurt · · Score: 5, Insightful

    Everyone remember the "Intel Inside" marketing campaign? Anyone remember "Authentic AMD"? The Intel Inside campaign was based mainly on FUD and Intel's control over the x86 processor. Since the x86 was a "defacto standard" defined by Intel, only Intel could gaurentee that it followed the standard. If you used other people's CPUs, they might work, but they might not. Better safe than sorry, right?

    If Intel publically implements the x86-64 architecture, while more-or-less simultaneously dropping the IA64 architecture, it will be diaster. It would be publically admitting, in deed if not in word, that AMD controls the future evolution of the x86, not Intel. The best Intel could hope for would be for AMD to gain an incredible amount of credibility- which translates as sales in the lucrative but conservative buisness markets. Even worse, the current positions of AMD and Intel might even be reversed, with AMD being perceived as the flagship processor company and Intel the clone maker.

    Going to 64-bit is rapidly becoming not an option. Many desktop systems are having a gigabyte of memory installed. Even x86 servers often have three gigabytes of ram installed. The server market is even worse off than the desktop market, as all the ram is generally given over to a single application (Exchange, or a database, for example)- and a 32-bit processor simply can not access more than about 2-3 gig of memory in a single application. The big-iron Unix cpus (Sun's SPARC, HP's PA-RISC, IBM's Power-4, etc) all went 64-bit years ago. It's not unusual to see even "moderate" servers of 4-, 8-, and 16- CPUs having tens of gigabytes of RAM already. The only market that still supports 32-bit CPUs is the embedded market- not a market Intel has ever displayed much interest in.

    I figure that the x86 has maybe 3 years to go 64-bit across the board, or we'll be facing another 640K like situation. 3 years is two Moore's Law generations- meaning the people with 1G of memory today will be wanting 4G in 3 years, and the people only getting 256M today will be getting 1G. They'll continue to be hurt in the server market, but they won't lose much in the desktop. Unfortunately, to be 64-bit across the board means the high end needs to be 64-bit within about 18 months (allowing for a Moore's Law generation to push the 64-bit CPUs down the price scale).

    Hammer is in a position to do that. McKinnley is the succeed or die point for the IA64. To use an analogy, Intel will have run out of runway- either it flies, or it'll hit the trees.
    The successors don't matter- if McKinnley doesn't succeed, Hammer will be there to take the sales. If Intel stays in denial and doesn't offer a viable 64-bit path, they'll be in worse shape than simply admitting that they lost.

    At that point, the best thing Intel could do is roll out a Hammer of their own, and plan on less than 50% market share.

    Brian

  6. The Inanium, or why VLIW sucks by Animats · · Score: 5, Insightful
    The basic problem with the Itanium is that it's a Very Long Instruction Word machine. VILW machines require a compiler that can recognize parallelism, which is hard. Worse, the code has to be such that explicit parallelism helps. If there's a lot of branching, the compiler has to be incredibly smart (and may need profiling data feedback) to do a good job. I went to a talk by the HP compiler guys who were trying to do an optimizing Itanium compiler, and they were having real problems.

    VILW is an old idea. It's been obsoleted by superscalar processors. It turns out to be better to find parallelism at run-time in hardware than to find it at compile time.

    The real reason for the Itanium was to have something that had some intellectual property that AMD couldn't clone, allowing Intel to crank up the price and get their margins back up.

    As for the AMD 64-bit machine, it's entirely vanilla. It's very x86 like, with the same instruction set, a few more registers (yay!), and of course the registers are longer. It has all the obvious backwards compatibility stuff. It comes up emulating a 32-bit x86 machine, so old OSs will run, but can be put into 64-bit mode. In 64-bit mode, it can simulate multiple virtual 32-bit machines, so you can have a 64-bit OS running both 64-bit and 32-bit processes. (Run 32-bit Windows under 64-bit Linux!)

    Wierdly, the x86 instruction set isn't viewed as that bad today. The variable-length instructions aren't that much of a problem to decode any more. Speculative decode takes care of that. One big advantage of RISC architectures was that making all the instructions the same length simplified decode and allowed more look ahead. That's a dead issue. Making the instructions all the same length causes about a 2x code bloat, which is now unnecessary.

    The other big RISC advantage was having lots of registers. Register renaming and caches have killed that advantage. Today, a register is just a short name for a recently referenced variable. There are far more registers inside a Pentium Pro and later than the few explicit ones you can mention in x86 code. In fact, one advantage to not having too many registers is that it shortens subroutine calls and context switches. The machines with huge numbers of explicit registers, like SPARC machines, put a lot of effort into saving and restoring them.