Slashdot Mirror
Is Rambus Destined to Return?
An anonymous reader pointed us to an article running over at Tom's that talks
about the world
of ram and criticizes the performance of DDR. The article goes
into DDR333, DDR400, and Rambus, and explains the issues at higher
clockspeeds.
Experience tells us that Rambus is faster.
Pocket books tell us that ddr is better.
Which will your wife let you decide on?
Sorry...
Why is Grand Theft Auto a much more serious crime than Reckless Driving?
The fact is that most IC testers today support the lower-speed parallel connections. High-speed serial connections like Rambus and SERDES require very expensive mixed-signal testers with expensive and complicated load boards (the PCB between the tester itself and the chip). These high-speed serial I/Os on the memory ICs themselves are also generally much larger than on a DRAM, probably by a factor of 5. So, you don't get die savings, you don't get lower test costs, and most of all you don't have any processors whose front-side buses exploit this. Plus, you have very expensive target products in terms of motherboards to support the Rambus ram requiring tight trace routing and signal isolation, and their very limiting 28ohm max impedance (at least with the PC800 RDRAM), almost completely opposite in difficulty to DDR. So where's the advantage?
If you also figure that the memory controllers for Rambus are configured for dual-channel operation, it becomes much clearer that the advantage is not in the memory architecture itself but in the controllers. Suppose a server board manufacturer decides to support quad-channel PC2700 1GBx4. That's 10.8 GB/s of potential memory bandwith on sequential accesses! There's hope with chipsets like the Nvidia nForce420 dual-channel DDR, but the Athlon FSB is the limiting factor there. And let's not get into the infamous first-access latency issues which I hope they're finally addressing.
Rambus is also notorious for poor tech support. I worked for a major silicon vendor using their core, and they never responded to our requests for minimum PLL-to-Rambus core distances. It was abjectly ridiculous, but not surprising considering that regular SDR/DDR memory interfaces outnumbered Rambus designs 100:1. Have things changed? Considering what their legal bills have been lately and an erosion of their tech support, I doubt they can afford to improve it much.
It wasn't a bad article... I mean, the facts -do- show that the p4 runs better with RDRAM, and he addresses the consequences of that quite well, and quite neutrally. For that I commend him.
But he does misrepresent some issues. For example, signal integrity issues. I can say with complete assurance that Rambus is loaded with signal integrity issues. These issues get -very bad- as the clock frequency goes up. Also Rambus is -not-, strictly speaking, a serial bus. First, it is 16 bits wide, while pure serial would be 1. Second, the depiction of a DIMM as being a unterminated stub with significant SI issues is correct, but this doesn't go away with rambus, and this definition of "serial" fails as well. While the signals do pass through a RIMM continuously, eliminating the RIMM itself as the source of major SI problems, you still have each and every RDRAM device itself acting as an unterminated stub, each of which causes reflections of its own. Especially for devices with tolerances as low as RDRAM, this can be difficult to manage. While in the balance I'd have to concede that at a given clock frequency RDRAM has the SI advantage, remember that RDRAM needs 4x the clock frequency of DDR to match bandwidth.
Or you could have 2 channels of rambus, and only need 2x the frequency. Well, 2 channel DDR is becoming a reality. Not only does nForce support it, Sledgehammer will as well. Neither of these are Intel platforms, but I would guess that going dual-channel would be a natural step for VIA and others competing with Intel chipsets. It would especially make sense for p4, as it would more than make up the memory bandwidth disparity that currently exists.
Speaking of nForce, another thing I take issue with is the suggestion that the nforce's DIMM-slot population problems are indicative that DDR is crippled by SI issues. I think more likely is that this was the first chipset designed by a company whose experience lies solely with graphics cards, on which the ram is directly soddered to the PCB. Lack of experience in the harsher SI conditions of a computer motherboard are to blame.
Speaking of DIMM population, it's hard for me to see only having 2 DIMM's on some boards as a particularly black mark for DDR... That leaves you with 2GB per channel, the same as RAMBUS.
So, he was right about some things, insightful on others, but the picture is -not- so clear-cut in the image of rambus Inc.
The enemies of Democracy are
The days of cheap memory are over.
They say this because of the huge expense needed to provide 512MB or more of ultra fast memory. But what if they added yet another level of "cache"?
Put in 128MB or more of super-fast RAM (faster than today's RDRAM or DDRAM, maybe using an exotic bus) backed by gigs of cheap, easy-to-make memory (PC266 DDRAM or slower). The cheap ram is still orders of magnitude faster than a disk drive. Manage them with hardware that does page swapping similar to virtual memory.
You could get good system performance and lower overall cost.
No, his points are valid.
Interleaved memory designs (interleaving on a slot basis rather than interleaving on the RAM stick itself) causes many issues. First off, you have to have more slots for equivalent upgradeability. And more slots requires you to have more layers on the motherboard due to increased number of traces (although, admittedly, RDRAM has vastly fewer traces than SDRAM even so). It also requires more real estate on the board, which isn't debateable. Second, you start running into timing issues more often with interleaving than standard memory clocking. Sure, as you say, it depends how robust your controller is. But, funny thing, RDRAM either has amazingly shitty controllers, or they're just vastly more prone to lockups when you have slightly differing speed memory.
As for heat - it's not a tradeoff issue. DDR didn't double the heat of standard SDRAM, and RDRAM isn't merely twice as hot as DDR. It's absurdly hot. And heat is a major computer issue already between CPUs, chipsets, and graphics cards throwing off oodles of heat as is. I don't know of a manufacturer that has a fan blowing specifically over the RAM, but RDRAM could certainly benefit from this. Heat kills systems (more specifically, thermal changes kill systems, but you'll get faster thermal changes with hotter components), so why design a system with RDRAM that is so much hotter than the alternatives? For how little (if any) of a performance gain?
Oh, and you claim RDRAM is twice the speed. Ok. Want to compare apples to apples? Put RDRAM in a non-interleaved system (yes, they're out there. They're even predominant) and the memory bandwidth is only slightly higher than DDR. Or compare it to an interleaved DDR system (again, they're out there). Boom. You have a DDR system with nearly as much bandwidth as RDRAM.
And, frankly, bandwidth ain't all it's cracked up to be. Funny how DDR systems routinely spank RDRAM systems in real world benchmarks (not pure memory bench's). Why? Because latency is king. Particularly if you're multitasking. You'll hit different areas of memory so much that bandwidth will make little difference compared to latency. And RDRAM has really, really miserable latency. And it gets higher as you add more sticks. So while it's great for some things (video editing/streaming, etc), it sucks for most applications.
Um... How was that FUD?
It's true. If the heatsink falls off your Athlon it is toast. (note that just in the last week or so a board was released that supported the XP's thermal diode... but for all other boards/chips, you still get toast)
Tom isn't the genius a lot of people think he is (or that he'd want you to think), but that was not FUD.
The enemies of Democracy are