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What's Next in CPU Land after Itanium?
"I work for a major research organization. Of late a lot of the normal big computer companies have been visiting and preaching the gospel of
Itanium. My question to them, and to the assembled masses here at Slashdot is what happens next when Itanium is real? My world view is that Itanium based systems will become commodity products very quickly after good silicon is available in reasonable volume. At that point, why should one spend $8-10k for that hardware from the likes of HP, Compaq, Dell and others when one can build it for $2k (or even less)? In other words, has Intel finally done in most of their customers by obliterating all the other CPU choices (except IBM Power4 [& friends G4, et al] and AMD Hammer) and turned the remainder of the marketplace into raw commodity goods? Lest you defend the other CPUs... Sparc is dead,
Sun doesn't have the money (more than US$1B we'll guess) to do another round. PA-RISC is done, as HP has
given away the architecture group. MIPS lacks
funding (and perhaps even the idea people at this point). Alpha is
gone too (also because of the heavy investment problem no doubt). Most other CPUs don't have an installed base that makes any difference, especially in the high end computing world. So what's next? I don't like the single track future that Intel has just because it is a single track!"
Actually, I was just transferred to the UltraSPARC 4 project at Sun in Burlington, MA. I don't know of the official release date, though I've heard rumors of early 2003. I'm amazed at the quality of FUD in this "article" and that it actually made it to the front page of Slashdot.
No, you can't build something like a Netfinity (oops. er - xSeries eServer) in your garage for $2k. Built into a high-level xSeries is:
1) Hot-pluggable power supplies, drives, and PCI - slots.
2) Built-in hot-plug SCSI
3) Integrated service processor for diagnostics (essentially a computer within a computer)
4) Extremely well-tested box. (Very important to do integration testing on high-end units.)
5) Very nice, serviceable, rack-mount chassis
6) Crap-load of PCI slots
7) Light-path diagnostics. (Lets somebody without training figure out what's broke.)
8) IBM Director
9) Well-designed cooling that would be impossible to achieve with a garage box. (Do you know how to do airflow modeling?)
10) Support.
The list goes on...
Yes, they will become a commodity, in that you will be able to get them from multiple major manufacturers, but don't expect to build it yourself in your basement anytime soon.
SirWired
Hi,
Speed of light is 3.10^8 m/s
In a nanosecond (10^-9s), light travels 30cm,
not 1cm like you wrote.
Someone remind me to post a link back to this story in a month or two when Sun announces their faster processors with solved ecache solutions...
Fud, fud, fud. I can't speak for the other companies but Sun can easily afford to fund R&D on the next generation SPARC chip, they've got 6 billion $ cash in hand. Let alone investments, and have done for over 2 years. BTW the current generation is UltraSPARCIII, UltraSPARCIV is just a fabrication improvement. Work is already underway on UltraSPARCV's design. Sun's crown jewels are SPARC/Solaris, when Sun stops working on their own OS/CPU/Server platform it's time to stop investing in them.
# init 5
Connection closed.
Oh...
4X AGP is a 32-bit 266 MHz bus. That's more throughput than possible with PCI.
Unless you buy into Intel's PCI-X, which is 64/133.
And most graphics cards are not limited by bus bandwidth with *any* flavour of AGP (see the various Tom's Hardware benchmarks). The usual limit is fill rate for new cards, and lack of geometry processing for old cards (assuming you're playing a new game). Textures are stored on-card by any sane game, so the only thing going across the bus is lists of triangles.
AGP doesn't have contention with other devices on the bus so it doesn't have to do any logic for mastering or controlling and can allocate all its clocks to doing a data transfer.
While this would be an issue for very short data transfers, graphics cards will likely be transferring large batches of data. This is done in burst mode, which gives one transfer per clock.
Why would you want PCI? The only advantage PCI gives is that you can hang multiple devices off of it. But while that lets you get multiple monitor support easier, it will really kill your limited bandwidth.
You have bandwidth to spare; all you'd be doing in a multi-monitor setup is sending the same triangle lists over the bus, not cutting and pasting image data or doing texturing. Have one one dominant card and leave the others snooping traffic, and you have zero extra overhead for this.
The real benefit of having multiple video cards is that it lets you easily do render farming for things like games. Have each card render half the screen, and copy all cards' partial renderings to one card's frame buffer. 32/33 PCI is too slow to be practical for this, but 64/66 has more than enough bandwidth. I studied the feasibility of this at one of my past jobs.
"the ONLY reason the Pentium Pro didn't catch on was because Microsoft released a 16bit OS and told everyone it"
I wouldn't say ONLY. There was also the slight problem of the double chip package (separate cache and cpu dies mounted on one substrate) being horrendously expensive to produce. Looks like Itanium will have thesame problem.
So basically you're saying that computers are magical radio-wave transcievers? Funny, I thought computers were based on capacitively switched [Bi]CMOS transistors. This means the "logical operation" travels at the speed of the capacitor charge / discharge times. After the ramp-up, ramp-down time (further delayed by theinnefficiencies of junctions), then the signal travels at the drift velocity of the electrons trapped within the conduction-band; significantly slower than a stream of free-flowing electrons, much less a single electron going full-tilt.
In fact, when electrons start going close to the speed of light within a silicon, there's typically an avalanching effect (utilized in zenor diodes). Channel break-down can easily occur under such situations (caused by relatively high voltages).
To my understanding, the single biggest speedup in the past several years was the introduction bipolar transistors into the CMOS frame-work. Bipolar are very fast (non-capacitively switched), have high current, high amplification, but are power-hogs and require difficult geometries to manufacture. My understanding of BiCMOS is that FET's are used everywhere, but when a FET needs to be charged quickly (or generally requires high current output), a bipolar device is attached on the output as an amplifier. You get the best of both worlds (with the possible exception of the geometry limitations).
Wiring obviously was an issue because new copper based CPUs can run cooler and faster.
I only have an undergraduate understanding of the processes, but the simple point is that there are paracitics all throughout the architecture, and we're discovering efficincies everyday which provide percentage increases in overall performance. Thus it's not the speed, but the sophistication of the design.
There's lots of work going into light-based computing, but I don't think this will ever win out because they're plagued with even bigger interconnect problems and thus paracitics.
-Michael
-Michael