Hope for MIPS, From Toshiba

CDWert writes: "EE Times is reporting MIPS is teaming up with Toshiba, to develop their next generation 64 bit proccesor. After all the Itanium Speak and X86-64 talk going on here and the premature predictions of MIPS demise, through their inability to fund the next round I thought this would be refresing to MIPS fans." According to the article though, there will be no product until at least a year from now.

Comments

Broadcom/SiByte

[jlv]

It'll be interesting to see how it compares to the SiByte SB1, which a MIPS64 instruction set SOC with two cores.

Never thought .....

[CDWert]

Well I never thought Id get an article posted, submitted 7 and never one got accepted, ANYWAY as a result, I didnt complete my story, Just figuring what the hell and let the slashdot editors take it and run with it.

One of the coolest parts, I thought it will be a 0.10 micron process, is anyone else using this small of a process yet ?

Is there hope for SGI and MIPS or has SGI decided against it in total ?

Embedded...

[Cyclopedian]

This is for the embedded market. Sure, that's all well and good, but somebody tell me the benefits of a 64-bit chip in an embedded device vs a 32-bit chip.

If we're getting by pretty well on 32-bit chips, where's the market for 64-bit chips? High speed routers?
-cyc

Re:Embedded...

[Steveftoth]

maybe not a digital still camera, but definiatly a digital movie camera needs as much CPU as you can throw at it. With a larger processor, you can do more cool stuff on the fly with a camera, from the mundane ( compress harder to save space) to the strange, such as enhanceing the image on the fly ( night vision, color/brightness correction, etc.) Right now some ( if not most) cameras have these kinda of features, but with better processors it can only help to make them better. Also, if you had a CPU instead of an optimized graphics processor you could upgrade your camera.

Finding the niche to survive

[Lurks]

MIPs parts scale fairly well as an architecture. You can put a low power single issue one in a smalldevice or make something a bit more grunty by using a dual issue and incorporating FP co-processors and so on. (PS2's EE has such a custom core) They're more suited to this sort of hack-and-slash bespoke CPU design for things which need workstation type levels of computational power than, say, ARM.

ARM's stuff has gained massive ground in the mobile devices and virtually squeezed MIPS (and everyone else) out of that market entirely. The trouble is that MIPS are being squeezed on the upper end of the scale as well by some seriously grunty main CPUs which are starting to adopte the same sort of friendliness to bespoke licensing for incorporation into VLSIs. Such as IBM's PowerPC chips. By way of an example, Sony aren't going with MIPS for the PS3, they're teaming up with IBM.

So where is left for MIPS? Sounds like they're going after SoT type applications which are in need of serious performance, niche that they are. Make something all singing, all dancing with a damn nippy core in there and you hit applications which ARM haven't got the performance for and PPC type chips don't have the power considerations and SoT/integration levels for. Good luck to them.

Re:Why will this be any better?

[CDWert]

I understand you confusion.

Your question has to be one of the most confusing Ive ever read, its valid and a good question, the answer is MIPS is far more experienced in RISC architecture than Intel, and second the low cost low power consupion goal from the beggining, they will be using a 0.10 process and any competition is good competition, this processor though is intended for imbedded devices, howd you like a 1ghz risc pda ? Cant really see you squeezing an Itaninum in.

I didnt mean to be terse about your question, It gave me a laugh I had to read it 3 times, kinda like how much wood would a woodchuk chuck if a woodchuck could chuck wood....:)