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Intel Moves To 533MHz FSB
homerj79 writes: "Intel has launched an upgrade 850 chipset and faster Pentium 4's today. The new chipset, dubbed the 850E, supports a 533MHz (133MHz x 4) front side bus, as do the processors. Supporting processors come in speeds of 2.53, 2.4 and 2.26GHz. The 2.4GHz part is denoted as supporting the new FSB by a 'B' tagged to the end of it. And it appears as if the new chipset gives the P4 a performance boost in most apps over the previous 400MHz FSB chips and the Athlon XP." Meanwhile, back at the other processor ranch, firemoth writes: "Today OCAU has something special - They've gotten their hands on 3 AthlonXP
CPU's based on AMD's new "Thoroughbred" core. This is the .13 micron
process, of course, with lower voltage. This article compares them to the
older Palomino core in both speed and temperature.. and they throw one into a
Vapochill supercooling case and see just how fast it can go."
There are several kinds of FSB's out there...most of them operate at 100 or 133mhz. What's all this business about 200 and 533mhz busses you say? It has to do with "when" the data is being sent.
Let's look at a clock signal for a second in primative ascii form:
___ ___ ___
.../ \.../ \.../ etc
An SDR bus sends data once every mhz. The components send a bit of data around each time the signal rises.
A DDR bus sends data when the clock signal changes. So a bit gets sent when the clock rises, and again when it falls. While the clock may only be 100mhz, you're sending 2x as much data around so the equivilant clock rate is actually 200mhz.
A QDR bus sends data at the different edges of the clock signal. Notice that the clock signal doesn't instantly flip on and off -- there is a transitional period. So it sends a bit when the signal starts to rise, sends another when it reaches the top, sends a 3rd one when it starts to fall, and sends a 4th one when it reaches the bottom. While the clock may only be 100mhz, it's effective clock rate is really 400mhz.
So, Intel really just moved from a 100mhz system bus to a 133mhz system bus.
DDR1600 ~= CAS 2.5 ram running at 200mhz (100mhz * 2)
DDR2100 ~= CAS 2.5 ram running at 266mhz (133mhz * 2)
DDR2400 ~= CAS 2 ram running at 266mhz (133mhz * 2)
DDR2700 ~= CAS 2.5 ram running at 333mhz (166mhz * 2)
DDR3000 ~= CAS 2 ram running at 333mhz (166mhz * 2)
CAS latency kind of represents the "ping" time of the ram. The lower the latency the better. The numbers after the "DDR" represent the theoretical bandwidth that can be obtained by the chip.
I'm not up to date on markings on RDRAM memory modules or what they mean, so I can't really offer any insight into it.
There isn't a rule for remembering which number goes with what FSB frequency. Most places that sell the stuff will list both bits of information though, so it isn't too big of a deal. I'm sure a mathematical formula could be made, but it's easier just to memorize which is which than a forumula which requires the use of a calculator.