New Power Macs Have Crippled DDR Memory?
eggboard writes "According to Rob Art Morgan, who has tested this, the new Power Macs from Apple that use DDR (double data rate) memory -- like the Xserve rank-mount unit -- cannot access the memory any faster than the cheaper and slower SDRAM found in the previous system arch. A controller limits the data rate to 1 GB/s, while DDR could work more than twice as fast. Unfortunately, this makes mincemeat of the architecture, as it bus-/memory-bounds 2D and 3D graphics and rendering."
You haven't the slightest idea what you're talking about, do you?
Motorola makes the CPU. Motorola makes CPUs that don't support DDR access to memory.
Apple makes the motherboards. Apple implements DDR memory everywhere except in the CPU.
IBM just announced vector computing support in the Power4. Vector computing is a big part of Apple's strategy, and until recently it was only available from Motorola.
The new Power Macs have a heat dissipation mechanism that's capable of dealing with many times the heat load of the currently shipping systems. They added this feature despite the fact that the previous generation of Power Macs had no particular heat problems.
Can't you read the writing on the wall? Apple has designed this new Power Mac to accept new, faster processors, and lots of 'em. A four-processor system is not unreasonable given the amount of space and heat dissipation inside this new chassis. Six or eight processors might even be possible, if everything comes together just right.
Don't assume you have the first idea what Apple has planned until you get all the facts.
The base configs of each machine are NOT listed.
The base OS configs of each machine are NOT listed.
The combined running configs, ie, size of objects, optional software (especially 3rd party apps and gui-players), etc, etc.
Guess what - each of the above - without running a single line or click of a benchmark can help in determining the outcome.
I'll wait to see how bad or good the new machines are - but I can tell you in advance, the old dual 1Ghz machines and the new ones are not identical at all in the CPU area.
Some folks have to learn to read and understand specs before jumping up and down and screamming.
Just my 2 cents, from the peanut gallery here in NY
Gil
-- Where ever you go, don't complain, you went there!
I think Apple is definitely positioning themselves to be capable of moving to Intel quickly if needed. But I have a feeling they will go IBM if at all possible. The PPC hardware is superior to Intel's hardware, and I think Apple wants to stick with this sign of quality.
Then if that falls through somehow, they'll be ready to move to Intel.
Just my feeling on it.
If you want to make an apple pie from scratch, you must first create the universe. -- Carl Sagan
The data rate between CPU and RAM is limited to 1.3 GB/s. However there is still more than 1.3 GB/s of bandwidth for the GPU (AGP 4x which goes at about 0.5 GB/s), DMA calls from hard disks, etc. So graphics and rendering are not strictly bus-limited, as the GPU can never fully stress the bus. Furthermore, the GPU wasn't tested in the BareFeats benchmarks!
Furthermore, don't forget that the L3 cache on the new 1GHz Macs is only 1 MB, not 2 MB as it was in the previous 1GHz Macs (and as it remains in the 1.25 GHz Macs).
All these benchmarks teach us is that CPU-limited tasks like those posted at BareFeats are not a good test of the added throughput between the system controller and RAM. We need to see benchmarks that stress all of the throughput, not just the portion between CPU, controller, and RAM.
Can't you see that everyone is buying station wagons?
Roumour is, is that MOT is still pissed about the "Mac Clone" fiacso - they were expecting for a huge increase of G3 production due to more and diferent Macs being sold, and invested accordingly. Apple killed that dream, and MOT hasen't been too eager to invest in anthing Apple needs.
Just a roumour thogh. File it away in the round-file.
Moneyed corporations, non-working 'poor' and criminal prisoners are turning productive citizens into tax-slaves.
And even for typical CPU/memory intensive tasks I really don't think the G4 CPU is FSB bandwidth limited.
m l# S14256
I've seen a lot of comments on various web sites about the new 1Ghz bemoaning its lack of a DDR front side bus. Though I too am a little disappointed I think everyone has got sucked into the Apple marketing distortion field. I'm also disappointed to see comments on a few sites saying "clearly" the dual CPUs in the "Wind Tunnel" G4s are FSB bandwidth limited.
These claims require proof and the proof just isn't there. These best counter argument I've seen so far was a comment on xlr8yourmac.com
http://xlr8yourmac.com/archives/aug02/081402.ht
where a user reported:
1) A quick check shows it to be 3 (and bit) times the performance of my 667 Mhz G4 system (7450 processor). It scaled linearly (e.g. 2 * (1000/667)) despite the improved memory system. [BTW - the new dual 1GHz has 1MB DDR L3 per CPU, vs 2MB DDR L3 cache per CPU with the dual 1GHz Quicksilver model] The FSB is clearly SDR from the documentation and performance. The memory system is DDR. I need to run more tests.
Hmm that "clearly" word again.
Well the 7455 bus is still SDR but the thing to note in this report is the "performance scaled linearly" with clock speed. As both machines use similar CPUs (7450 in one and 7455 the newer there are no large changes in the CPU design) the conclusion we draw from this is that the CPU is *not* memory I/O bound (i.e. FSB bandwidth bound). If it was the increase in performance would be less than 2 * (1000/667) times. So running both CPUs flat out doesn't saturate the memory bus (and all the usual other traffic is kept off the internal bus by the IO controller if it moved by DMA transfers).
It also implies that for most applications (the tester doesn't describe the tests they used so whatever test they used) the 1Mbyte per CPU cache is sufficient and its loss
I'd like to see more measurements done to confirm this hypothesis but it looks like magically speeding up the bus won't cause the CPU through to improve dramatically. The way to do this (if anyone has a chance is to run some CPU and memory bound applications on the all three models (and try to correct for the different cache sizes and FSB speeds) but if you see close the linear relationship then the CPUs are certainly not held back by the front side bus.
And h0tblack has a point that DMA will get more of a workout with Quartz Extreme though I suspect it will be less than he expects (most of the stuff should be in the GPU VRAM for compositing and anything that gets there will have to be worked on by the CPU to some extent at least once).
Yeah sure, you can get cpu upgrades from other people, assuming they aren't out of business (XLR8), selling overclocked parts as the real deal (powerlogix), or can actually get G4's > 500 MHz (for the longest time only apple even HAD parts > 500 MHz).
Apple has fucked up royally. They figured duct-taping in the DDR would fool everyone into thinking the machines had gotten a speed boost, when the only boost is the addition of the 1.25GHz unit.
I think the "1 GB/s" was taken from a comment in the original review on Bare Feats. There was an "explanation" posted from a reader that made the bogus claim that the memory bandwidth was limited to 1 GB/s even in the models with a 166MHz system bus. I notice that the revised Bare Feats report has removed that whole section.
Anyway, the thing that stands out about these benchmarks is that the new dual 1GHz has a system bus (and memory bandwidth) that is 25% faster than the old one, yet this made no discernable difference in these particular benchmarks. This isn't surprising considering that these are CPU-intensive tests, but the bizarre thing is the number of people who are claiming that this somehow proves that the DDR implementation is useless, a fraud, etc. etc. They seem to think these benchmarks would improve dramatically if the DDR bandwidth was passed on to the CPUs.
This isn't logical. Why would a real 25% improvement in memory bandwidth have no influence at all on the benchmarks, yet a 100% improvement which would come from a "real DDR" implementation suddenly make a big difference.
The results of these particular benchmarks would be the same because they are CPU intensive tasks and therfore are bound by CPU speed. (That is, for these tasks much more time is spent in CPU processing that in reading or writing memory). There's no magic change Apple could make in other parts of the system that will make 1GHz CPUs process faster than 1GHz.
That isn't to say that the 166MHz system bus and the DDR implementation Apple is using isn't advantageous in generaly system usage, it is just to say that these benchmarks will not reveal those advantages.
- Dennis D.