AMD Talks About Internal Benchmarks for Opterons

ggruschow writes "AMD's CTO says their 2.0-Ghz Opteron (aka Hammer) beat a 2.8-Ghz Xeon (P4) on both SPECint2000 and SPECfp2000 tests, but was mixed against an Intel 1-Ghz Itanium 2 (details at ExtremeTech). IBM predicted "conservative" 1.8-Ghz PowerPC 970 scores, which fall in the middle of the pack (sweet for OS X). It's probably not a coincidence that AMD's news comes so soon after Gartner said x86-64 would fail. Even if Intel loses the performance crown again, their upcoming mobile processor is looking pretty spiff with its recently announced 1MB of cache. Sounds like next year might finally bring a worthy upgrade for my 486dx4-160."

Comments

Clawhammer

[Perdo]

Clawhammer (Athlon) has a single 16 bit wide hyper transport bus.

The workstation Sledgehammer (Opteron) has two 16 bit busses

The server Sledgehammer (Opteron) has three 16 bit busses

The spec results are as follows:

Spec_int

PIII1G 426
G4 1ghz 306
G5 937 (IBM PowerPC 970)
2.8Ghz p4 1010
XP 2800 933
Itanium 1Ghz 810
Power4 1300 804
Clawhammer 2.0 Ghz 1202

Spec_fp

PII 1Ghz 426
G4 1Ghz 187
2.8 Ghz p4 947
XP 2800 782
Itanium 1Ghz 1356
Power4 1300 1169
Clawhammer 2.0Ghz 1170

Opteron??? Higher than clawhammer considering the multiple hyper transport busses 1/2 mb L2 (compared to clawhammer's 256/512 l2) and dual on chip DDR memory controllers compared to Clawhammers single memory controller

Bootleg Powerpoint Presentation:

http://130.236.229.26/download/misc/AMD-Opteron. pp t

and

http://a26.lambo.student.liu.se/download/misc/AM D- Opteron.ppt

Read the Show notes! AMD failed to edit them out

Filename is AMD-Opteron.ppt google search it.

Includes a system that is an Opteron workstation dualed with a clawhammer that still presents itself as a single proc system. The clawhammer acts as a math co-processer :)

Re:486 160 mhz? (History lane)

[zensonic]

Your konwledge isn't that good. The fastest 486 in terms of Mhz was the Amd 5x86 - 133Mhz (4*33Mhz) chip. That chip easily overclocked to 160Mhz (4*40Mhz). In terms of pentium performance (integer wise) it was equivalent of a P75 at 133Mhz and of a P90 at 160Mhz (give or take a few percent)

In terms of performance the fastest chip that fitted in a socket 3 was the Cyrix 5x86 120Mhz, which (again speaking of integer performance) was equivalent of a P100.

I hope Hammer will fix the rc5 crippled speed!!

[Anonymous Coward]

I hope THIS mask rev of Opteron (Hammer) chip will be faster than January 2002 PowerPC G4 chips.

Currently, according to the RC5 benchmarks AMD is far slower than dual cpu macintoshes (half as fast). (source available for cor rc5 loops for most processors). RC5 was silently completed in June or so but a bug went unnoticed for a couple months, but the contest is over. They measured performance in units of "Mac poerbooks" in their press releases.

The Mac Dual 1 Ghz g4 is faster than all existing dual AMD motherboards in RC5 benchmark by almost 100%.

21,129,654 RC5 keyrate for dual 1 Ghz g4 system ! And Now apple sells dual 1.25 Ghz stock which would be even faster.

A dual 1800+ AMD MP gets only HALF as many as a Mac! 10,807,034 rc5 keys !

Funny "Mhz myth" there showing itself I guess... Apple now is selling even FASTER machines but with smaller caches and less fast read-write ram (it now uses DDR on newest boxes).

And the macs are using low power g4 chips meant for microcontroller usages with very little predictive branching and a simple 7 stage RISC pipeline depth. (macs complete many many instructions per cycle though, unlike Pentiums).

The mac I mentioned uses a 2 MB L3 cache and no AMD MP dual cpu boards I know about have any L3 cache at all, so maybe that is whay some common macs are over twice as fast, its not just altivec meager tweaks to rc5. AMS have similar , but less mazing vector ops.

Another reason the mac might be over twice as fast as an amd dual mp board is not just the 2MB l3 cache but the fact that mac can read and write to a cold page of memory simulatneously FASTER than any AMD MP designs which are biased for linear access and streaming. Many memory scatter benchmarks show this too. Appels newest DDR-RAM machines might not offer this feature though.

So basically, will the new Hammer systems be able to get close to speed for RC5 and other crypto tasks as the RISC based Powerpcs?

I really want to know. And I am so sad to see Slashdot reduced to fanboys modding down anything discussing tech subjects like this as "flames" all the damned time. This post is all informatinve and factual and my reason for asking is genuine.

http://www.research.ibm.com/journal/rd46-1.html has 5 LARGE technical articles on how the POWER4 chip was designed... in PDF form too. Even if you do not appreciate the Power4 (which apple is using a dual-core version of in many months) you might want to read these PDFs because they are all about chip design.

They put the floating point on the corners of the chip die to help spread heat, etc. Hundreds of interesting facts and pictures on at that site.

Top500.org lists Power3 dominating the cluster speeds of the top 500 computer clusters for memory+float speed. Power4 will soon start appearing in that list as well as the "lite" version with only 2 MB of cache instead of 4,6, and 16 MB.

Plus the new chip apple will start using announced yesterday, will have SIMD "VMX" or Velocity Engine added (Moto calls theirs"altivec").... only 90% of altivecs hundreds of opcodes will be offerred though.

With Pricewatch showing cheapest 800Mhz Itanium bare cpu at almost 8 THOUSAND dollars, and 3.5 thousand for the old itanium 700 Mhz, it does not take a financial genius to see why apple's workstations are selling so well nowadays.

Re:*sigh*

[tconnors]

For straight CPU intensive tasks it matters.

But for 99% of normal peoples taskes 10% whont matter.

10% never matters. We regularly run simulations here that take a month. What is 10% on top of a month? 3 days. If you have already been waiting 30 days, what does another 3 matter? It probably corresponds to the weekend anyway.....

Windows XP

[droyad]

I hear that people are saying it would be difficult to port Windows XP to RISC chips (and new 64bit arch). This infact is not true. In the Windows NT family there are 2 features that make it easy:

1) It's mostly written in c/c++
2) The HAL (Harware Abstraction Layer) contains most of the platform specific code. As I understand it the kernel does not actually handle the hardware directly

Ofcourse I can see it going like this:
1) Apple, Intel, AMD and Moterola put forward new Chip designs
2) They ask MS to support it with their OS
3) MS picks Intel

--

$vi any_article_on_iraq
:s/iraq/microsoft/gi
:s/Weapons of mass destruction/Windows/gi
:s/Axis of evil/Redmond/gi
:s/In this post september 11 climate/Service Pack 1/gi
:s/Bush/Linux/gi
:wq