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Intel Pushes Pentium 4 Past 3 GHz
denisbergeron writes "Yahoo has the news about the new P4 who will run at nothing less than 3.06 GHz. But the great avance will be the hyperthreading technology (already present in Xeon) that allows multiple software threads to run more efficiently on a single processor."
Hyperthreading works well for certain types of software, and awful for others.
Here's an article from Ars Technica on HT/SMT.
I was torn between building another dual-CPU box (currently on twin 533Mhz Celerons with an ABit BP6 board), or going the small form-factor route. Now I can do both.
More at Shuttle's site.
Cheers,
Ian
Spreadsheets were the killer app that caused the PC to take off, and Lotus 123 came with a super-annoying floppy-based copy protection scheme. They intentionally misformatted the floppy, then the program verified that it was an original by doing low-level tricks with the floppy controller.
The most ridiculous and shortsighted part was that they used CPU-based timing loops to do the timing for their stupid floppy tricks. Of course, these were calibrated to the only CPU speed available at the time, 4.77MHz. As a consequence, if a PC was going to run Lotus 123, it needed to be able to slow down to the original 4.77MHz speed while it read the Lotus floppy. IIRC, Compaq had a nifty patent that automatically slowed the PC whenever the floppy controller was in use. Others had to make do with a manual switch.
The cost to society for this DRM fiasco, hundreds of millions of useless bezel switches, undoubtedly was far greater than any revenue that Lotus made by thwarting piracy. (In fact, their revenue from DRM might be negative, because they were eventually displaced by non copy-protected comptetiters.)
Sorry, but your post reeks of "armchair CPU designer" : It's all so clear and so obvious. I mean, it's not like Intel and AMD have a lot of extremely clever people who seek the best balance between all of the systems...is it?
Yes, they are slowly improving, but modern PCs are still behind where workstations were years ago, and a modern Intel based server is well behind a SPARC based machine.
Intel and AMD will spend their money on whatever generates the most ROI. They have collectively spent literally billions of dollars convincing Joe Public that CPU Mhz is the best way to measure the speed of a system - they aren't going to throw that away. A competent manager with R&D dollars to spend will therefore spend them on increasing Mhz.
Oh, and your post reeks of being underexposed to any architecture other than x86.
though the cost/benefit is out of whack. A P2 2.4Ghz with 2MB of L2 would get trounced by a 2.6Mhz with 512MB of L2 cache, disputing your claims that CPU speed doesn't matter. Large cache chips only make sense if you can't get a faster CPU:
Yes, assuming the code to run is 512k in size. If the code is ~2M, so it fits into L2 on the slower processor, then it will have the advantage, because the faster one will have to waste cycles moving the cache back and forth to main memory. Cache size is related to CPU speed only in terms of memory bandwidth: if your CPU cannot get data from main memory fast enough to keep it occupied, then you need faster memory closer to the CPU, which is what a cache is. If you are context switching, then you will have to keep dumping the cache and reloading it, which puts larger caches at a disadvantage.
Ultimately, caches are a hack; an elastoplast solution to the fundamental problem, which is the mismatch between the rate at which a modern CPU can process data, and the rate at which memory can supply it. In an ideal system, there would be no CPU caches at all, because the CPU could get data from main memory fast enough to keep it fully occupied. Systems used to be built like this, before the current obsession with clock speeds.