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Bringing Back the PDP8
Anne Thwacks writes " Andrew Grillet has decided that the Digial PDP8 - the first ever minicomputer, will rise from the dead.
He is calling it the PDQ8. Sure others have done software emulations, and even hardware clones, but he is not just building a hardware clone, but trying to revive the whole idea of 12 bit computers!"
Many of you probably have used Xilink's 1000, 2000, or 4000-series FPGA card during laboratories for your undergrad classes.
Well, if you'd like, you can follow this design of an FGPA implementation of the original PDP-8 computer!
If you've used Verilog (a hardware design programming language), like I have, you can even download all the code!
If you celebrate Xmas, befriend me (538
It's a strange dream. The only 8's that had a knob on the front were PDP 8/e, 8/f, and 8/m and they all shared basically the same front panel design. The knob selected the register that would display on the front panel. It had no effect at all on the operational mode of the machine.
"Eve of Destruction", it's not just for old hippies anymore...
Maybe someone would enlighten the rest of us on why a certain bit size is better than another, and why we currently use 8/16/32/64, instead of 12/24/48/96 ?
This article explains why base-3 systems are actually a lot better than base-2 from a theoretical perspective, but that it was much easier to design hardware in base-2, so base-2 became the de-facto standard. Nowadays we could probably fab base-3 hardware fairly easily, but it's not worth doing so with all the base-2 hardware already in existance.
As for 16/32/64 instead of 12/24/48, it's just one of those things. IBM's earlier AS/400s ran on 48-bit processors (now they are 64-bit). 96-bit floating point is an IEEE standard. And do you know why file permissions in Unix are rwxrwxrwx? It's because they borrowed that idea from another operating system designed for 9-bit bytes and a 36-bit processor.
As nice as a base-3 system my be in theory, there are very good reasons for sticking to a base-2 system in hardware. As we are moving to smaller and smaller fabrication processes, it is necessary to lower the supply voltage Vdd. For example, now that we are approaching the 0.1um and 900nm levels (at least in research labs), Vdd is getting down around 1 Volt. However, the Vt (the threshold voltage needed to turn "on" a MOS transistor) stays the same, because it is determined by physical properties of silicon (mostly). That means we're losing headroom. To implement ternary logic, we would need 3 different voltage levels. We're simply running out of room to do things like that. You need to leave a noise margin around your "1" and "0" values for reliable operation. (For example, if Vdd=1V, you might consider 0.0-0.4 = "0", 0.6-1.0 = "1". Then a logic gate that "sees" 0.0-0.5 interprets it as "0", etc. If you had a "0" that was really 0.4V, you would hope that "noise" wouldn't bump it up above 0.5V, or else it would look like a "1".)
The threshold voltage for transistors is somewhere under 0.2-0.3V usually (depening on the technology & lots of other parameters). So, you absolutely need a 0.6V supply. (0-0.3 = "0", 0.3-0.6 = "1".) Unfortunately, even with Vdd=1V, you'll get voltage drops happening throughout the chip ("IR drops" - as in I=current times R=resistance) so that the 1V may only look like 0.8V to some parts of your circuit.
From the above discussion, it should be obvious that there really isn't room to shoehorn in a third voltage level. Also, a nice feature of CMOS design is that when a gate is sitting in a "0" or a "1" state, it is drawing no (well, negligible) power. Power is only dissipated while a value is switching from a 0/1 or vice versa. Off hand, I can't think of a way to do that with a third logic-value. Consider drawing even a tiny amount of current while a gate is sitting at logic "2" (or whatever you want to call the 3rd value). 1mA (milliAmp) times 1 million transistors on a chip = 1000 Amps. That chip's going to get a little hot!
Ok, so you've probably got at least two questions, which I will try to answer in advance. If you've got other questions - I'll just let someone else tackle those.
Q1) Why don't we just use a higher Vdd (supply voltage)?
A1) If you're using smaller transistor widths, you simply can't. When you use a really thin gate (i.e. 0.1um) on a transistor, the breakdown voltage of the gate is reduced. If you use a higher voltage, the transistor melts. (You could use larger transistors, but that kind of defeats the whole purpose! We make transistors smaller because we can fit more on a chip, and they operate faster and use less power.)
Q2) Can't we lower the threshold voltage?
A2) Yes, to some extent. (It's not always easy.) But we don't want to. Even when a transistor is "off", there is still a very small amount of leakage current flowing through it. If you reduce the Vth, you also increase the amount of leakage current. In older technologies, this hasn't been much of a problem, because the leakage current was so small in comparison to the dynamic power consumption. But as we are putting more and more transistors on a chip, the leakage power consumption in modern chips can easily add up to 30%-40% of the total power consumption. There's also another reason. If you did that, you would be lowering your noise margin. And you don't really have much control over the noise (which is why it's called that). If you reduce noise margins too much, you'll find it almost impossible to create a circuit that actually functions reliably.
Well, I hope that satisfies some of you (and doesn't get the rest of you too upset). VLSI circuit fabrication is a really neat field. Some of the tricks that are being used these days to fabricate that chip sitting in your computer and get it running at 2GHz (or aren't they up to 3GHz now?) are quite amazing - they're doing their best to cheat physics! Using a ternary counting system to build computers may have a lot of nice theoretical properties, but I can't see it displacing binary any time soon, except possibly in some really specialized applications. (There are always exceptions.)
That's my $0.03 worth. (Hey, I typed a lot. I think that's worth at least $0.01 extra. Maybe $0.025?.) Any errors in the above are mine, but I won't admit it.