Slashdot Mirror
Software/Hardware FPGA Dev Board that runs Linux
bforsse writes "The ML300 allows engineers to develop
hardware with HDL synthesis/simulation and software with standard GNU tools. The entire system is implemented inside one FPGA with an integrated IBM PPC processor. The board comes with all the peripherals that a standard motherboard or laptop has and then some.
It currently ships with MontaVista Linux, a number of other linux flavors and OSs are in the pipeline. Maybe this new merging of the hardware and software worlds will settle some of the religious wars between hw and sw engineers?...ok, maybe not."
The GNU tools are just for the software part.. the actual FPGA design tools are still covered by what looks like 200 patents (and runs on NT or Solaris)
But still, me wants! Think about it.. 4 PowerPC cores embedded in a sea of programmable logic? *drool*
EG, the XC2VP7 which is used in the core of that board has a PowerPC (>250 MHz), 8 SERDESes which can speak Gb ethernet with optical transievers (among other things), about 100 Kb of RAM, and 11,000 4-LUTs and flip-flops.
Xilinx promises that at the end of the year, in suitable quantities (>25,000), they will be $100/each.
Test your net with Netalyzr
Icarus (http://www.icarus.com/eda/verilog/) is a competent Verilog (not VHDL) open source simulator. It even has some support for sythesizing to some FPGA libraries.
Verilog is more common than VHDL in the US, so this is the only open source HDL tool I've used. Primarily, we are still slaves to Synopsis and Cadence though.
As with software, a lot of modules exist (mostly quite expensive) for logic blocks up to and including microprocessor cores. Rather than having a chip with a single function, it is possible to squeeze multiple functions upto the limits imposed by the gate count.
FPGAs can be reprogrammable, or programmable once only. There is a often fusable link inside that once blown prevents reprogramming or designs to be read out.
If you are producing quantity, then you can go from an FPGA component to a gate array which is programmed by a photographic mask during manufacture. The mask is prepared from the same program that created the FPGA. The setup costs are high, but once you talk about big numbers of chips, the component becomes significantly cheaper than an FPGA and often better performing.
It's a Field Programmable Gate Array...
/.errs; Trying my best with a shallow understanding.
It's a piece o hardware that you can buy to do stuff (you tell it how to map out a 'virtual processor'). If you had one large enough you could emulate an x86 cpu.
They're used mostly in applications where (price OR time to market OR development costs) are a big factor. Custom silicon for a custom purpose will always be faster, and cheaper (If you build enough to justify the development costs).
Flame away, more knowledgeable
It is used in early stages of hardware design to verify timing and functional correctness, and heavily in education. Sometimes final production products will use FPGAs, but usually only when the production volume is low. This is because FPGAs are more expensive per individual unit than ASICs (Application Specific Integrated Circuits), but ASICs require more expense on design costs.
All circuits busy.
The book "ASIC" has a good chapter on FPGAs. Go to the following link and review chapter 5. http://www.dacafe.com/ASICs.htm
But the answer your question briefly, the internal structure of the FPGA is an array of computational logic blocks. The boundary between these blocks in the array is routing logic that allows nearly arbitrary connections between the logic blocks. There are also IO blocks at the perimeter of the array. Each logic block typically consists of some combinational logic followed by a register element. The combinational logic element can be programmed to implement arbitrary logic functions of around 4-8 inputs. Thus you can configure a block to be a 1 bit adder, a mux, register, etc. By programming the CLBs and routing between the blocks, an hardware system can be built. You write the hardware description in Verilog, VHDL or schematics capture. Then a synthesizer maps your design to a bit pattern necessary to program the FPGA. You generally program this into the chip or into an external flash memory connected to the FPGA.
Well, there have been a couple of attempts, but nothing complete...
Right now the most interesting one is a VHDL frontend for GCC called GHDL.
Also note that you need a lot more than a simulator to get it to work with this board: you need a synthesis tool that can map into the Xilinx part. The FPGA companies tend to keep their formats quite proprietary, so don't expect any open source tools for synthesis and tech mapping any time soon.... (unfortunately).
Certainly, Modelsim
Jeff
stty erase ^H
The ability to run one or more concurrent instances of Linux (or whatever, quite frankly) internally to one of the Xilinx Virtex II parts is seriously amazing. Ignore the board it comes on for development for now - that is just cruft. The Virtex II is probably the most powerful instantly reconfigurable DSP engine in existence (think audio, video manipulation at real time speeds). They have internal hardware to perform from 16 to 128 simultaneous 16x16 multiply/accumulate operations simultaneously, _in_one_clock_cycle_. And if you don't like what it is doing, you can change it, time and time again, forever. Raw Power. Complete Reconfigurability. Sweet!
Combine this kind of power with multiple PPC processors on the same die, and the possibilities are incredible. The big difficulty is that the operation of the hardware and software can be so tightly tied together that it is difficult to program and debug. Everything is controlled by software (both the software and the VHDL or Verilog based FPGA code) and so the possibilities are limitless.
Kudos to Jim Ready and the folks at Monta Vista for supporting this kind of device with development tools for Linux.
Soli Deo Gloria
I'm suprised nobody has mentioned symphony eda's vhdl compiler/simulator. The command-line tools are free and for the price ($199 per node-locked license per year) the graphical interface is good. I just dropped modelsim and aldec in favor of sonata for my fpga design work.
http://www.symphonyeda.com
The CPU board, that has all of the main components on it, is an 16 layer board. It comes with 8 - 3.125 gigabit capable transceivers (used as 4 gigabit fiber, two HSSDC2/Infiniband and two Serial ATA), 128 MBytes of DDR, 2 PS/2, 2 Serial Ports, Parallel Port, FireWire, two PCCard/PCMCIA slots, Compact Flash interface (for configuration and file system) PMC slot, BDM and Trace ports, JTAG port, AC97 audio codec and a kitchen sink.
The Power-I/O board, that has the TFT, most of the I/O and the majority of power regulation, is an 8 layer board, and has a 640x480 TFT, 14 I/O buttons, a multitude of LEDs and a small prototyping area underneath the TFT.
Included with the kit is a 1GB microdrive, 2 fiber cables, 2 serial cables, an HSSDC2 cable, a serial ATA cable, two flavors of firewire, a Parallel Cable 4 programming cable, Xilinx ISE software, Chipscope ILA Pro, and on and on.In addition, I would like to say that this was an exciting project to work on - between the gigabit transceivers, the DDR and the high density of components on the board, this was the hardest board I've designed (I did the majority of the schematics and parts of the layout).
First Falcon-1 to orbit, then Falcon-9. Then I can die a happy man.
The bulk of the cost of the ML300 is not in the FPGA. The peripherals on the board and the accessories in the kit constitute a lot of the price.
If you're interested in a "standalone" development board those are also available.