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Celeron 2GHz Cache Detection?

EAJoe asks: "I have small problem with one Celeron 2GHz machine. Linux kernel 2.4.18-24.7 doesn't seem to switch L2 cache on! This CPU apparently _has_ 128K of L2. There is nothing about L2 in the logs, and /proc/cpuinfo shows an L1D size of 8K instead. Of course I have enabled L2 in BIOS settings (the motherboard is an ASUS P4S533-E, by the way). The CPU overclocks easily up to 3.5 GHz, running stable at 3 - it seems that cache is really switched off. At 3 GHz g++ compilation times are similar to Athlon XP 1800+ machine. I don't have windows on this computer to check this out, but Intel DOS utility shows a Celeron 2000 w/128k L2, also there is '128K' written on the CPU's die. Any suggestions?"

28 comments

  1. Possible solution and directions to go from here. by Manax · · Score: 4, Insightful
    Maybe you should do a little Google search.

    The first link that returns is an old kernel patch, specifically for enabling the L2 cache on a Celeron, although with "powerleap", whatever that is. That is something to try though, just make sure you have a backup kernel to boot from.

    Also, there was a post to lkml with a similar question here without a solution.

    If you don't find a solution, the best place to post isn't slashdot but to LKML.

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  2. compilation times without a cache? by YE · · Score: 2, Interesting

    Hmmm, I doubt that without the L2 cache compilation times would be anywhere near the Athlon 1800+. More like an Athlon 180+. Compilation is a very random-memory-access process, so it would kill the P4 core with its relatively large memory latency without a cache.

    Try running a test that repeatedly accesses a block of memory 124, 125, 126, 127, 128 etc. KB in size. If you see a significant drop in speed when the block size grows above 128, you probably have your cache.

    Anyway, is it the _kernel_'s job to turn on the cache? Isn't that supposed to be the BIOS' job?

    1. Re:compilation times without a cache? by Manax · · Score: 2, Informative
      You should be able to see the actual cache size that linux sees via /proc/cpuinfo, look for "cache size".

      I agree, it should really be the BIOS' job to turn on the cache, and there were some references to buggy BIOSes in the minor searching I did.

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    2. Re:compilation times without a cache? by seann · · Score: 1

      as I understand it, the kernel doesn't care what the BIOS says, it goes on its own thing. eg: replace a hard drive with a cdrom on a x86 system, and mount it. The cdrom will mount, despite the BIOS telling you that there is a hard drive there.

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    3. Re:compilation times without a cache? by SpaceLifeForm · · Score: 1

      I agree. I have an old 486 that will NOT boot unless I tell the BIOS that there are NO hard drives. I have to boot it via a floppy with a kernel on it.

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    4. Re:compilation times without a cache? by SlipDisc · · Score: 1

      cat /proc/cpuinfo
      processor : 0
      vendor_id : GenuineIntel
      cpu family : 15
      model : 1
      model name : Intel(R) Celeron(R) CPU 1.80GHz
      stepping : 3
      cpu MHz : 1800.328
      cache size : 8 KB
      fdiv_bug : no
      hlt_bug : no
      f00f_bug : no
      coma_bug : no
      fpu : yes
      fpu_exception : yes
      cpuid level : 2
      wp : yes
      flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
      bogomips : 3591.37

    5. Re:compilation times without a cache? by EAJoe · · Score: 1

      L2 is turned on in the BIOS. The kernel can use it, but it doesn't. I don't believe that Celeron /northwood chip, in fact/ can be as slow @3000, as Athlon XP at 1533 (1800+). I can believe in 20% performance drop, not 100%, sorry. Especially when L2 size is not reported properly by kernel... I tried to follow your suggestion of directly measuring performance drop for memory access. I run some old benchmark, but results are not easy to interpret. Performance drops at 32-64K for Cel, and 64-128K chunks for Athlon XP..... ;} It's not so easy, as it seems, maybe you know good cache benchmark for linux ?

  3. A Suggestion for cliff... by Anonymous Coward · · Score: 0, Funny

    Cliff, I have a suggestion. How about, when you get a question from someone, read it, do a quick 10 second google search for the answer, and if you find the answer, don't post it! Great concept huh!?

    Then, instead of putting the lame question on SLASHDOT for cryin out loud, just email him the answer that you found in 10 seconds!

    -Anonymouse

    -
    I fear bad karma...so I hide.

    1. Re:A Suggestion for cliff... by EAJoe · · Score: 1

      I don't like to be called 'lame' :( - especially when nobody posts the answer to my question. I posted the problem on comp.os.linux.hardware /or kernel, don't remember/, and got no answer. It seems that suggestion of writing to kernel mailing list is the best solution.

  4. Re:YHO YL HAND by Anonymous Coward · · Score: 0

    How is this offtopic? Buddy overclocked his celeron, burned out the L2 cache, now the L2 doesn't work.

  5. Similar.... by doublehelix_nz · · Score: 1

    I have a 1.7ghz p4 williamete with 128kb of L2 (celeron 1.7ghz :P) (stable at 2.1ghz+ with intel OEM HSF rated to 2.4ghz)... Some programs do actualy have trouble determining the cache of the CPU, (2 mIRC scripts say 0kb, and a few other programs display blanks under L2..)

    Dont know if its related but yea......

    1. Re:Similar.... by Gothmolly · · Score: 1

      So your system information tool is mIRC? Wow... you divulged more than you know.

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    2. Re:Similar.... by Anonymous Coward · · Score: 0

      no its not my main sis info utill, i use AIDA for that....

  6. Please benchmark with cache turned off in BIOS by Adam+J.+Richter · · Score: 1

    Can you please try running your compilation benchmark with the BIOS attempting to turn the cache on and the BIOS attempting to turn the cache on, and verify that the compilation times match? Please try doing the compilation a few times each way, so you can have some sense of the variation not due to this change. That would help confirm whether the cache is indeed off in both cases.

  7. Re:Possible solution and directions to go from her by Build6 · · Score: 2

    although with "powerleap", whatever that is

    "Powerleap" probably refers to the device sold by the company, that allows you to mount certain proc types on motherboards that wouldn't accept them otherwise, either because of different pinouts or whatever reason (IIRC even one where the voltages were different?), within certain limits (I don't think they sell anything that allows you to plug an 486 into a Socket A slot :-).

  8. 128k is the celeron max by sherlockholmespi · · Score: 0, Redundant

    the celeron only come swith 128k that will probbaly help u understand why its only 128k. Ddin't u no that when u bought it?

  9. Hey, Thanks, Slashdot! by Elias+Israel · · Score: 1

    Inspired by this thread, I double-checked one of my systems, found that the L2 cache wasn't being picked up because of a BIOS bug, flashed the BIOS with the newest version and got an instant, free speed boost on an aging machine.

    Thanks, slashdot!

  10. Frys Christmas Deal - Celeron 2Ghz w/ECS P4VXASD2+ by Anonymous Coward · · Score: 0

    I'm having the same problem with a 2ghz 478 pin Celeron. I upgraded the BIOS, have tried various cachesize= hacks and have even tried modifying arch/i386/kernel/bluesmoke.c a bit to force l2size, but that hasn't worked. The code from powerleap doesnt apply to this situation. There is a genuine problem here.

    processor : 0
    vendor_id : GenuineIntel
    cpu family : 15
    model : 2
    model name : Intel(R) Celeron(R) CPU 2.00GHz
    stepping : 7
    cpu MHz : 2000.123
    cache size : 8 KB
    fdiv_bug : no
    hlt_bug : no
    f00f_bug : no
    coma_bug : no
    fpu : yes
    fpu_exception : yes
    cpuid level : 2
    wp : yes
    flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
    bogomips : 3984.58

    This system was sold for 99$ at Frys Electronics (2ghz cpu 128k L2) (ECS p4 mainboard p4vxasd2+) and hit alot of customers.

    Even with the most recent bios update, the machine still dosen't respond differently when L2 cache is enabled on the bios *or* disabled.

    The problem is that 478 pin Celeron's differ from other chips in some way when it comes to enabling the bios. Please, someone point me in a better direction, I have researched everywhere, and cannot solve this problem myself. Will read replies here.

  11. Re:Frys Christmas Deal - Celeron 2Ghz w/ECS P4VXAS by EAJoe · · Score: 1

    It's not the hardware problem! - in win2k with drivers from the MB's CD, Sandra cache benchmark shows great results for L2 cache, below 128KB block size beating at 3GHz everything except Xeon 2800. So the cache is definitely 128KB, running with full CPU clock. Only linux kernels are not able to switch it on, because I can't believe that the CPU itself can be twice as slow as Athlon XP at the same clock frequency. (compilation times for Cel@3000 similar to AthlonXP@1533).

  12. Re:Possible solution and directions to go from her by EAJoe · · Score: 1

    I made google search, of course, found question you mentioned, but I have different problem. POST on my PC doesn't show L2 cache size, (or it disappears too fast ;] - I'll check), but in Win2K everything is OK in Sandra L2 cache benchmarks. Cache works VERY fast and performance drops above 128KB blocks. Probably you are right suggesting to directly contact people working on kernel, thx

  13. Re:YHO YL HAND by EAJoe · · Score: 1

    ;) I thought the same, until I installed win2k and Sandra benchmarks which proved that L2 feels good and goes like crazy at 3000...