Introduction to 64-bit Computing and x86-64
James writes "Ars Technica has an article up explaining 64-bit computing from the x86 angle, specifically from the angle of AMD's Hammer. The article explains the details in that usual Ars style, and I found it very useful for thinking about what kinds of applications I may want to put to the test on one of these when we get a box in the office. Even non-x86 freaks may appreciate this, since it breaks down some of the basic advantages of 64-bit computing, and just who can expect to see gains in the near future."
From the article:
These modes are set for each segment of code on a per-segment basis by means of two bits in the segment's code segment descriptor.
So you just get your compiler to generate two segments. You'd have to figure out how to call one or the other, but there is the basis for it.
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a small point, but the author is wrong about underflow. from the review:
you get a situation called either overflow (i.e. the result was greater than the highest positive integer) or underflow (i.e. the result was less than the largest negative integer)
underflow is when you're trying to represent a fractional number smaller than the smallest floating point number available. ie: you went too close to zero.
From the elf(3) manual page:
[snip]
ELF provides a framework in which to define a family of object files, supporting multiple processors and architectures. An important distinction among object files is the class, or capacity, of the file. The 32-bit class supports architectures in which a 32-bit object can represent addresses, file sizes, etc., as in the following.
[snip]
So, basically it's possible with ELF. I don't know about PE. Otherwise, bundling is possible. Just look at Mac OS X/NeXTSTEP, which used fat bins with Bundles.
They forget to mention that even if you can have more than 4gb on xeon machine you cannot address any single block of more than 4gb.
True
Forget about putting your oracle db into memory.
Not true
On a Xeon machine, Oracle will let you put up to 62GB in memory. The trick is an operating system call that fiddles the page table and "swaps" pages from areas you can't see to areas inside your address space. It works well for applications that aer conscious of 4K pages and not page thrashing. Databases are the prime example, executing a few dozen privileged instructions and changing the page tables is much faster than going to disk.
Here's a description of how to do it on Linux:
For Windows, it's called Address Windowing Extensions (AWE).
I think MySQL supports these tricks too
Alan.
There's more to this chip than that, too. The HyperTransport bus architecture they have created is very cool. Cheap, fast, and scalable for medium-sized SMP boxes. And 64-bit addressability, despite your assertion, is indeed useful today for servers, which routinely hit the 4GB barrier.
Backward compatibility is important, not only for existing software, but for existing compilers. Supporting long mode is nearly trivial. Just add the REX prefix in the appropriate places, remove deprecated instructions, support RIP addressing, and implement the ABI. Ok, that sounds like a lot, but compared to IA64 it's a cinch.
I'm under NDA, so I can't say much more, but I really like this architecture, and I want to get a dual myself for home use.
Patrick Doyle
I mod down every jackass who puts his moderation policy in his sig. Oh, wait a sec....