End of The Von Neumann Computing Age?

olafo writes "Three recent Forbes articles: Chipping Away, Flexible Flyers and Super-Cheap Supercomputers cite attractive alternatives to traditional Von Neumann computers and microprocessors. One even mentions we're approaching the end of the Von Neumann age and the beginning of a new Reconfigurable computing age. Are we ready?"

Comments

Well,

[0x00000dcc]

Paradigms in science are not meant to last forever, they are usually broken, and computer science is no stranger to this candy.

Three articles

[stratjakt]

Two requiring a subscription, and one a goofy PR piece about wingnut FPGA "computers" that cost 200Gs and up.

Anyways. The FPGA machines sound intriguing, but really arent as 'all powerful' as the non-techie Forbes piece makes them out to be. Not everything is parralellizable, not everything is conducive to dynamically altering the instruction set as you run it.

The traditional von neumman architecture is the best solution for many processing tasks, lots of stuff is just conducive to a sequentially operating processor. It's probably the best for all around general computing.

And 200 grand is probably better spent on a beowulf cluster of something than one of these boxes, but I'm sure they have a niche of usefulness somewhere.

I dont expect to see the traditional computer go anywhere anytime soon.

Futureware

[Ghoser777]

"Gilson has not subjected his machines to industry benchmark tests."

Yeah, I have a computer doing 1 trillion giggaflops a second powered by my pet hamster. No test results can disprove me yet!

"I live in the future."

Clearly.

"'It's really a far-out research machine,' he says. 'It's more about what's coming in the future.'"

Yep. So the title is kind of misleading. This is all stuff in the future, like flying cars and such. We could make flying cars if we wanted to, but we really don't want to yet (economic and regulatory reasons). This technology has the impedments of still really being explored and economic feasibility.

It'll rock when they're ready, but it's nothing to go nuts over yet.

F-bacher

What I think might have merit...

[Fnkmaster]

Much like custom vertex shaders and reconfigurable GPUs have greatly increased the capability of modern graphics cards and greatly reduced the amount of CPU cycles required for very complex real-time 3D graphics, I think that a reconfigurable logic coprocessor model has real potential to take certain computationally intensive repetitive tasks off the hands of a dedicated CPU. The problem of course is that the technology doesn't currently exist to, say, compile an arbitrary chunk of C code into a program that can run on an FPGA computer - the compiler technology is mentioned in the article as the current limiting reagent. A common understanding of how this should work needs to be developed, and rules for when it's useful, and the relationship between I/O constraints and processing speedups needs to be taken into consideration.

In general this "partitioning" process seems to be somewhat domain-specific and difficult. If you could do something like integrate into a JIT environment something that identified computationally intensive, repetitive, small-sized chunks that aren't I/O constrained, and be able to generate FPGA code on the fly, that would be tres cool.

Can anybody really explain why it's so hard to make a somewhat higher level language that can be compiled down to VHDL and combined with various chunks of library code into a specific FPGA configuration?