Modding The Barton XP To A Barton MP
Dr. Jackie Lee writes "Don't have the budget for an AMD Opteron? There's always a cheaper alternative with AMD's current Barton processors. In this article, we'll show you how to run these new Barton XP processors in SMP mode."
Yeah, great - mod your XPs to act like MPs.
Guess what? You can't guarantee they'll work - people on LKML have refused to help users who have done this, as it simply makes it impossible to determine whether problems are the fault of the kernel or of the CPU itself.
This is one for the overclockers who couldn't care less about stability, methinks...
It's always been known that the MP is just a regular chip that has been "thoroughly tested". And as I understood it, you could always use a regular, non-MP chip in a dual setup, anyway (at least on most motherboards).
Seriously, though, what gives? Is the only real difference between dual and single processing jumper controlled or is the decision made on the basis of testing - in which case, what might go wrong if you mod these things to run as dual processors?
Even given prevailing levels of cynicism about marketing departments, I would have thought that the potential for chip sales if dual processor boards became more common, would outweigh the loss of margins on the small existing DP business.
Given the main use for multiprocessor boards, I'd be nervous about a mod that might screw data integrity.
Panurge has posted for the last time. Thanks for the positive moderations.
and it's already down. I've been trying to load it since 6:12am.
/. effect is an early riser. Anyone snag the text before she died?
Apparently the
But another thing that troubles me somewhat is the idea that, perhaps, people are cheating AMD somewhat by doing this. Maybe the sales of Barton XPs are at a loss, but built with the same die as the MP because AMD doesn't want to blow the cash on retooling. If cheap CPUs are being subsidized by the sales of Barton MPs, aren't people who modify their CPUs performing the equivalent of, say, buying Windows XP Home and stealing Windows XP Server? It seems like a bit of a fuzzy issue, although with the popularity of P2P hardly one that's going to trouble most computer users.
Try not. Do or do not, there is no try.
-- Dr. Spock, stardate 2822-3.
Personally, I'm holding out for a mod that lets me turn my Barton XP into a Barton GP, because I really want to buy that next armor class.
Erik
YOU ARE SAYING IMPUDENCE TO ME! THAT IS IMPUDENCE!
not trolling, but a serious question, coming from a ex-SMP-user:
why SMP nowadays?
Most OS, including XP, is now reasonably stable to the point where multitasking, including buring a CD, while doing something else is OK. (not to mention that CD burners have buffer under-run protection *anyhow* nowadays) I know this because my laptop, which is a measly P3, can handle all of the multitasking I do, given that I have pumped up the amount of RAM.
If I was doing stuff for school / research, Mathematica, Matlab, Maple, Spice (ok not 100% sure on spice) are all single processor only. And to be honest, if you are running a 3-day simulation, you really don't want to be playing UT at the same time on the same machine ANYWAY, so that's kind of a moot point. (you should probably not be playing UT period during such times, but that's a time management story that i won't get into)
If I was doing real work like rendering stuff, I think real work deserves a real SMP system, i.e. with a warrenty.
I mean, SMP has a pretty hefty price overhead (motherboard, memory if you want ECC, and the extra CPU, heavy duty power supply, another set of heatsinks etc), not to mention that the motherboard / chipset technology is usually a few monthes to two years behind the cutting edge stuff...
so, what convincing reason do a person have for using SMP right now (especially a ghetto-rigged one)?
My life in the land of the rising sun.
This is NOT a good idea. The MP cores are subject to much more stringent timing variance restrictions. Stick a couple of XP cores in their place, and you'll be getting random RAM errors (actually RAM->CPU bus errors), as well as slowdown due to cache coherency problems.
Does anyone know of a good introduction to modern PC hardware, the different processor cores and so on? I don't really know the major differences between Barton and Palomino. I'd like to know, partly for curiosity, but also because when I build PCs I may otherwise end up with something sub-optimal.
I'd also be interested in something that explains the structure of a PC system. What is the Northbridge, how is the PCI bus coupled to the processor, that sort of thing.
What We Know Thus Far
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More than a year ago, we reported a hack which you can apply to current Athlon XP processors to enable them to operate as Athlon MP processors. The hack was fairly simple and it involved connecting a certain trace on the Athlon XP processor to allow motherboards to recognize them as an Athlon MP. The trace has been cut in the factory so it's just a matter of connecting them via soldering (if you're brave enough), or just putting conductive paint on them.
The response we received from fellow users were phenomenal and from what we know, many have tried the hack. Although most were successful, some were not that lucky. Here are a few reasons which we can offer at this point in time
# You'll need to ensure both processors are properly modded so that the motherboard can successfully detect and operate the processors in SMP mode. Clean the contacts with acetone or isopropyl alcohol before applying the conductive paint.
# Certain motherboards would only work with the hack since certain users reported that they were unable to get their SMP setup running even though the processors have been properly modded.
# Only certain BIOS versions would allow the board to run in SMP mode. For example, we tested the hack on MSI's K7D Master which had no problems working with BIOS version 1.3 and 1.4B3. Newer BIOS versions somehow did not allow us to run the processors in dual mode even though the processors have already been physically modified.
After our first article, a lot of emails came pouring in and most users were asking if the hack could be achieved with a Thoroughbred core since our initial article was based on the Palomino core. Well, of course it would and we'll be showing some results with a dual Thoroughbred-B core in the later pages. What we've done here is taking another step further with the Barton core. What's interesting with the Barton is that it's now featuring a huge 512KB L2 cache running at full speed. Get a pair of that running in SMP mode, and you'll get a pretty decent workstation-class system going at a really affordable price.
Now, I'm sure most of you are interested to get your hands on a dual processor system based on two Athlon XP 2800+ (Barton). Find out how you can do that in the next few pages.
Modding the Barton Core
The process in modding the Barton core is just about the same as what we've done with the Palomino in previous articles. All you need to do is just to connect the rightmost bridge in the L5 row. That should probably get the processor detected and running in dual mode. However, that's not the end of the story yet as you'll still need to modify a couple of things on the processor to get it running up to speed.
We know that all the Barton cores are made for 333MHz FSB systems and their multipliers were set to run at its predefined frequency. If you put a Barton processor in older motherboards supporting up to 266MHz FSB, you'll probably get a severely underclocked processor and that's probably what will happen if you have the Barton XP running in an AMD 760MPX motherboard.
Naturally, the next logical step is to modify the Barton XP's multiplier. Since most server boards based on the AMD 760MPX chipset has no multiplier adjustments for anything more than 12.5x (at least for the MSI K7D Master), we'll have no choice but to hardwire the multipliers ourselves. OK, here are a few rules which we should observe
# The default frequency of the Barton XP 2800+ is only 2.083GHz (12.5 x 166MHz), so we should try to target a multiplier with a lower resulting frequency at 133MHz (266MHz DDR) FSB. It should at least ensure that your processor will boot-up after the modification. Since there aren't any 15.5x multiplier allocated for the Athlon XP/MP core, we have chosen to hardwire the multiplier to 15x on both the chips.
# Since the Barton cores come with more transistors allocated for the larger 512KB L2 cache, we should see an increase in power consum
Karma: Bad. (As in Good?)
My last SMP system was a pair of P3-700 O/C'd to 933 each. The noise was not bearable from its dozen or so high-power fans.
I think if you do it right the noise should be ok, though. If I remember my physics, two-heatsink/fan = double the sound energy output = +3dB of noise; but in reality your total noise is from the combination offans from the CPU, PS, HD, etc, so I don't think you should even notice as much as 3dB.
anyway, don't o/c though. I don't think it's worth it. =)
If I have everything on one processor, the different calls make the cache nearly useless. With SMP, I can put mathematica onto a processor of its own. With cache allowing for lightening fast ram calls, the speed increase is unbelieveable.
You can't judge a book by the way it wears its hair.
There's no circumvention to misuse copyrighted material. There's no encryption being broken to copy anything. It's nothing like DMCA material.
It's hardware hacking - plain and simple. Like modding your car to make it go faster.
Just because it's computer stuff doesn't mean it's either complication or illegal.
Now that P4's have hyperthreading I think it makes much more sense to get one of those. That way you dont need a tornado in your box to keep things cool and you get 80% of the benefit of dual processors.
http://rareformnewmedia.com/
I've run SMP systems, and I really do prefer them for my workstation. Lots of performance and stablity, and if I do something a little creazy, like compile a 2.5 kernel, it doesn't take forever! Plus, it has that Cyberpunk/Geek factor. The same reason that rackmount phones. Add to that, Dual CPU machines, like Sun SparcStations 10/20s, and Pentium I's and Pro are really cheap and fun to play with.
O.K., I admit, I'm a Geek...but who here isn't?!?!?!
BTW, the blooddy site is slashdotted, at 7 am! Wow.
ttyl
Farrell
CAN-CON 2019 - Ottawa's only book oriented Science Fiction Convention! October 18-20, Sheraton Hotel, Ottawa, Canada h
My hardware fix for today has already been met by slashdot. ATI 9800, dual proc barton (3000+'s of course), and all the additional parts to support it all (gotta have a gig of memory, fans and heatsinks galore, cool case mods to make it all the more cool-looking, 500W power source, gotta throw in the audigy 2). If only I had a lot of money and a lot of time on my hands....but instead i'm a broke slashdotter.
or something LIEk that.
what if you had to go bad, & found DOWt that your payper liesense had eXPired? what a mess?
I have *personally* never saw any hard evidence about this. anybody have a link / site / whitepaper / definitive source?
Now, it is possible that if the SMP portion of the chip have a failure (stuck transistor in a non critical portion, say), they can still sell it as a XP chip, but I don't see why it would require different *timing restrictions*. Believe it or not, it's still just moving data to and from the memory, and having a dedicated path to each CPU even makes this easier.
Granted there are memory control issues (locking, for example) involved, but cache coherency is handled (AFAIK - though my CPU architecture knowledge is very rusty) pretty much the same as a cache miss, so no big impact there.
So, I can imagine that changing an XP to an MP can get you bad things happening if you are unlucky enough to get a chip with a bad SMP block, but I don't think they would become as unstable as you are suggesting.
aaaanyway. I might be talking out of my ass, though. correct me if somebody knows the real straightdope.
My life in the land of the rising sun.
Boy, some guys sure have a death wish... I mean what else can explain a person posting a story, hosted on his own website, on slashdot?
What's under yellowstone?
They want to use multiple cpu as an alternative to an Opteron ? Sorry but two 32 bit processors isn't really the same as one 64bit.
already /.'ed at 6:30am ??!!
Dam, you have to get up REALLY early to beat these damn geeks to the good stuff....
here are few mirrors:
Mirror1 - its got a popup.
Mirror 2 - Mirror 2
Mirror 3 -Might get slashdotted.
Cram 20 blades in a 6U box with a lot of fans to help it keep cool and reserve one 1U case for a RAID array...
BOO! TERRO
Ok. Especially when talking about the brandnew 400FSB Barton: Which Chipset to run them on ?
In genereral, AMD still hasn't solved its chipset problem - worse for the MPs.
Tons of complaints from users of high end soundcards or videocards (not graphiccards) with SIS and especially VIA based Boards likely due to lousy PCI implementations.
AMDs own chipsets are terribly outdated and comparatively slow
nforce2 has no decent Linuxsupport (probably the same for *BSD). A least, as of yet.
Given the lack of heatspreader, that marketing joke with "3000+" and asynchronus RAM clock speeds, just for having a higher number do not really make AMD more sympathic or trustworthy.
One may sure argue, how much AMD is responsible for what VIA or SIS do. And no, I do not like Intel845 either.
Really sad, since I really do think the AMDs have the way better CPU design.
P4 sucks (how fast would it be against an equally clocked P-III ?), but righ now I do no see any alternative for the more demanding audience. Unfortunatly, since my PC brok recently. Right now I am stuck. Great Chipset and a lousy CPU or vice versa.
The world is just as flat as Göran Persson.
why SMP nowadays?
If I was doing stuff for school / research, Mathematica, Matlab, Maple, Spice (ok not 100% sure on spice) are all single processor only.
Well, I'm doing programs for research, in biomagnetism field. We have to display up to 1.5 GB of data (in different ways: magnetic map display, channel display, frequency spectrum display) and make different kind of math analysis on them.
The programs need to be as fast as possible (faster programs mean more subjects analyzed a day), so we write our own C++ code (using a couple of math libraries too) in a multithreaded fashion. Depending on the algorithm the speed gain ranges between 1.2/1.8 times the single processor version. In our work SMP isn't just useful, is necessary!
And don't forget that if you write a multithreaded algorithm in a good way, it'll be scalable to N processors just changing a variable. It means that if in the future we'll have cheap machines with 4 processors we'll just have to change some #defines and get double the speed.
From the article
"""
If just one processor is of sub-standard quality, the whole system would crash and fail. Not recommended if you're intending to use the system for mission critical purposes.
"""
Whew, so what kind of guy takes two perfectly good CPUs, voids their warranty, solders their traces, messes with their multiplier, overclocks them, prays that they *might* work and then puts them to do DO MISSION CRITICAL TASK !!!
- mritunjai
Back in 1970 or so, UC Berkeley had two CDC 6400s. One had an extra cost instruction used to make process swapping easier, and was used for an experimental timesharing system (which flopped miserably eventually). I had an old program I was fooling around with, FORTRAN, which self modified itself gradually to execute that missing instruction and die, and marked the card deck specifically to only run on machine "A" to avoid the instruction ... it crashed the machine. Turns out the instruction was actually there, but the techs added in the missing wire to make their diagnostic code run, and had been to lazy to ever disconnect it again afterwards.
Infuriate left and right
...there goes another kitty...
Windows is always impressively responsive; its scheduler is well suited to interactive and low-latency multimedia type tasks.
Linux on the other hand leaves a lot to be desired. I find that in some cases under Linux my 2.4 GHz P4 is less responsive than my old dual processor 266 MHz P-II. That is certainly not the case under windows.
To fix this, Linux needs not only a smaller scheduler quantum; it also needs the low-latency and pre-emptible kernel patches. I won't touch those until Linus accepts them because I am concerned about their stability. The non-booting (until recently) 32 processor system is one example of problems they can cause.
Linux also needs scheduler modifications to give more priority to short tasks, but I believe those have been done and are coming in the next major kernel version.
okay, I really think you are missing my original intention of asking this question from the perspective of a "average user," or even "slightly above average but still under 3 std-dev on the bell curve kind of user."
otoh, if you need that kind of power in an acedemic environment, clusters might be the real way to go... In my school, we had a cluster that simulated transistor operations (down to the subatomic particle level), and that was a few dozen dual-proc P3s (this was a few years back) with maxed out RAM.
But at the same time, I don't quite think you'd be doing these important stuff on a hacked XP SMP system now, would you =)
My life in the land of the rising sun.
If it's a matter of just bridging a circut trace in order to reconise an xp chip vs an mp chip, isn't there perhaps external to the chip layer solution?
Either via a motherboard mod.... or CPU socket adapter.
I ask because the value of the XP chips starts at about $123 per unit (OEM) , where the motherboard starts at roughly $160 per unit. I'd rather modify a motherboard then a pair of chips. Motherboards are bigger, though surface mount, more able to accept wires rather then silver paint.
There is no sanctuary. There is no sanctuary. SHUT UP! There is no shut up. There is no shut up.
IIRC, the key improvement of the Barton is that it has more cache (twice as much?) as the previous Athlon core. From what I recall, more cache is a BIG benefit in SMP systems, since you have two CPUs sharing the same memory. i.e. it's a surprise there aren't SMP-ready Bartons on the market because it's a perfect use for the extra cache.
Either way, it is capable of doing significantly (10-20%) more per clock cycle than the previous Athlon core.
retrorocket.o not found, launch anyway?
NVidia GeForce and Quadro cards both use the EXACT same chip. They only differ in the PCI ID. Hence the ability of SoftQuadro to do its magic with driver hacks.
ATI does it too (9700 vs 9500), although in this case many 9500s failed testing as 9700s and will fry if the dead pipelines are re-enabled. (In this case, it's both about providing a lower-end part and about salvaging "reject" chips - 9700s with bad pixel pipelines had those pipes disabled and then were marked as 9500s.)
retrorocket.o not found, launch anyway?
The only difference was in the PCI ID and how the driver reacted to it.
Soldering was one approach of changing that ID - The other approach was to patch the driver to recognize a GF2 PCI ID as being a Quadro one, no soldering or hardware modifications involved.
retrorocket.o not found, launch anyway?
Transcoding of media from one format to another (DivX rips for example) is easily partitioned between multiple CPUs. There's a decoding process feeding data to a seperate encoding process. In many cases, between the two there's some scaling and filtering being done, which can also naturally be split to another processor. In some cases the app must be SMP-aware, but in others (AVISynth for example), you'll have these processes naturally partitioned to begin with.
retrorocket.o not found, launch anyway?
It wasn't a myth, but fact for many mainframes.
I used to work as shift op on a couple of ICL beasts (19xx's up to Series 39's)
I remember the firm I was working for ordering an "upgrade" to a higher spec, A date was set for the engineer to to do the work and a directive to "make sure that the machine room was cleared of all staff during the upgrade process in order to protect their 'Intellectual Property' was recieved from the vendor - we were also advised that the full upgrade would take approximately 4 hours.
I, as many ops at the time, was fairly good friends with the engineer that was usually tasked with work at our site (It was common for an engineer from the supplying company to be on-site many times a week, even had his own little on-site office), he arived on the due day, and after clearing out our IT Director got started, opened up his toolkit, blacked out the windows with black binliners, threw a switch then got the cards out & we played cards for about 3 or so hours.
This charade was very common, as some of these upgrades cost plenty of $$$ and the engineers/vendor *knew* they couldn't get away with letting IT Managers/Directors with spending power know exactly what was involved in an *upgrade*.
Krishna.
cos my dual 1.2ghz PIII cost me £300 to build
which is less than my gfx card cost!
There are places where the networks are not touching,and there are places where they are-Boeing's Lori Gunter
yea, like with the celerons.
i got my dad (still after 3 years) using a dual celeron 366. I oc them to 550, but had problems, and hes happy at 366.
Long story short, I cheated by using an Abit BP6.
and when it comes to intense work (not gaming) it still beats the pants off my roomate's athalon xp 2000.
-Grump
Is it true that more people vote for the winner of American Idol, than vote for the president? -Ali G.
A good few months ago I compared, side by side, the MP and XP specs. The documents were more or less identical but the SCHECK pins were documented in the MP docs, but not in the XP docs. Maybe the SCHECK pins are now documented in the XP docs, but I won't waste anymore time debating the difference between MP and XP, at least in terms of technical specs.
Anyone else looked into it?
Definition of SCHECK pins as listed in AMD-762 System Control
document.
"SCHECK[7:0]# B
AMD Athlon(TM) Processor System Bus Data Bus Check Byte
SCHECK[7:0]# transfer ECC check bits for data transferred on the
SDATA[63:0]# bus.
As Outputs: The AMD-762(TM) system controller drives SCHECK[7:0]# with
each valid data quadword. SCHECK[7:0]# are skew-aligned with the
source-synchronous clocks, SDATAINCLK[3:0]#.
As Inputs: The AMD-762 system controller samples SCHECK[7:0]# and
transfers the data to the memory. SCHECK[7:0]# are sampled by the
AMD-762(TM) system controller on each edge of SDATAOUTCLK[3:0]#.
SCHECK[7:0]# are floated by RESET#. Check bits for write data are
driven by the processor and check bits for read data are driven by the
system controller. The AMD-762 system controller drives the previous
data value between transfers to prevent floating inputs."
Techies all know that these two CPUs are the same, right? They're wrong.
It's true that the Athlon MP and XP are built as identical cores at the fab. In fact, you can tweak your L5 bridges on your Athlon XP to enable support for dual processors. Nonetheless, this still doesn't mean they're the same thing. Have you ever wondered why the Athlon MP lags behind the Athlon XP in megahertz? The flagship Athlon MP is only at 2800+ while Athlon XP is at 3200+...
Athlon MP's are binned Athlon XP's. No two CPU cores fabricated are absolutely identical, and the Athlon MP represent AMD's best product. The goal for the MP line of chips is to have lower temperatures for the same megahertz. This makes their clock ramp-up fall behind the Athlon XP line. Stability is the obvious benefit, however recall also that rackmount servers don't have the same exotic cooling solutions that your desktop may have. Binning is one way AMD ensures a superior product for multi-processor systems. The other way AMD ensures the MP lineup is reliable is that the first Athlon MP 2800+ is going to have a later CPU stepping than the first Athlon XP 3200+.
Actually, they wouldnt necessarily prosecute those individuals who unlock MP, but they would definitely prosecute those who published the information online.
These MP hacks are circumventing an access control mechanism (in this case, access to MP functionality which you didn't pay for) which is a clear violation of the DMCA.
I have a number of AMD SMP systems using non-MP cores and they work just fine, no slowdown no random ram errors no crashes at all.
You're just making shit up ("cache coherency proclems") to sound like you're informed. Oh wait, you're anonymous coward. So your post is dubious BS by default.
Did anyone else notice the Intel ad on the page with the article? It looks like a 15" Apple Powerbook to me. Nice.
If your claim were really true, they would be using the Mobile Athlon core for the MP processor line, but they're not. The mobile athlon core runs even less temp/power for the same mhz than the MP, but it's cheaper.
So your argument invites purchasing mobile athlons and using them for MP. In fact, your argument pretty much demands it.