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VIA's New Nehemiah M10000 Processor Reviewed

Posted by timothy on from the low-power-madness dept.

Joseph Wharton writes "Mini-ITX.com has a review of VIA's new Nehemiah M10000 EPIA-M motherboard and processor. Some of the new features include a full-speed floating-point unit (finally!), SSE instructions, 64KB of full-speed L2 cache, and (get this) a hardware-based random number generator. Also, there's IO/APIC support in these new procs, potentially paving the way for dual EPIA boards."

1 of 240 comments (clear)

  1. Re:64K cache by tjrw · · Score: 5, Interesting

    The write-up is misleading...
    The 64k is the L2 cache which is 16-way set-associative, full-speed and exclusive i.e. it doesn't overlap with the contents of the L1 cache. The L1 cache is 128k unless they've changed it (none of the immediately available info mentions the size, but that's what the current C3 has).

    So, actually the chip has 192K of cache, configured pretty much the same as it was in the AMD Duron (128k L1, 64k L2, exclusive). Considering the target marketplace and performance of the chip, this seems to be plenty.