Soft Processors in FPGAs?
cybergibbons asks: "We're students in the Department of Electrical and Electronic Engineering, Imperial College, and are carrying out some research for Altera into FPGAs, softcore processors, and hardware software co-design. Most embedded systems are a combination of hardware (for performance) and software (for versatility), and the design of these systems is getting more and more complex. Previously, the hardware and software was partitioned at the early stages of design, leading to sub-optimal solutions.
New languages such as SystemC and Handel C aim to merge the hardware and software design with one common language combining the high level algorithm design and low level RTL design ? the ultimate goal being to allow conventional C++ programs to be synthesized directly into working systems, without any human intervention. However, what we seem to have found is a lot of marketing spiel and conceptual papers with no practical ideas. Is anyone using any of these new tools? Are any of the current co-design tools any good? Do you think a computer can partition designs effectively into hardware and software? What features would you like to see in future tools? Do you envision any amazing new applications for FPGAs using new co-design tools?"
I think you'll find that Handle C , System C, etc are not likely to be very popular with the run-of-the-mill designer. Most of these folks (me included) don't see the need for yet another design language. We get along fine with Verilog or VHDL.
There HAS been a need identified for verification constructs in the languages - Vera and E are examples of stand-alone verification languages that are used in conjunction with the RTL design in Verilog/VHDL. With the advent of Superlog/SystemVerilog these languages are being included within Verilog itself. This features the best of both worlds, i.e. old IP still runs, and new constructs are added to make verification easier.
So while there are a few adopters of SystemC, etc. I suspect they will fall by the way-side as SystemVerilog becomes a reality. It seems the EDA industry is going to back SystemVerilog above the other choices, and most designers seem to feel this is the best solution.
Have you compiled your kernel today??
System/Handel C[++] are languages with two good points.
They allow software engineers to design hardware with minimal training and secondly they allow fantasticly fast simulations. The ultimate system of you feed in an MP3 decoder writen in C and you get a player with software at the other end is years (I think more than 10) away.
C is not a natural language to describe hardware. It creates large slow designs with very little transparency to the generated design. Transparency is important as a small looking piece of C code will generate a large slow design while a larger code will generate a smaller faster design. While trasparency is partly implicit in computer programs (You have a vague idea as to what the compiler will generate from your code) in hardware it is very easy to be well off.
FPGA's are getting more and more popular and powerfull. There are allready numerous CPU designs available and the current methods of creating them (mainly verilog and VHDL) seem to be generating much better results than system C ones.
As for soft computers I really like the idea. I would not be surprised to see some FPGA parts on the next 3d cards or CPUs. They allow hardware structures to replace complex code (e.g. I was trying to write code which effectively can be dome with a piece of CAM. hash tables are just a method of emulating CAM in programs).
To conclude, Yeah C based methods will become more popular but only because menagement like them. They produce appauling designs but as silicon area becomes nearly free and in areas where speed does not matter and you need to do a billion simulation runs to test it then yeah it will show it self more attractive to software engineers trying to do hardware. But at the end of the day this is all cheating. If you want to design hardware you really have to learn what structures there are at the bottom level and only then when you know what your compiler will produce for you can you effectively make use of such languages. If companys can affoard to get proper engineers to make hardware they may fetch some C monkey to do it instead but I think if you want to become one then you are selling your self short.
Mouse powered Chips, Open source Processors and Lego
What I find intriguing about these systems is the possibility of starting with some custom hardware, and lots of C code to perform logic, and interface with the custom hardware.
Now, if I knew that interface was solid. I'd just want a processor and a custom systems chip that did the usual memory/peripheral interfacing and whatever my special functions required. If I wasn't all that worried about chip count I might even put the special logic entirely on the memory bus as a seperate device.
But more frequently I have some complex logic that I probably want to do in hardware, but I'm not certain and I'm not 100% certain that the algorithm is correct. For speed of development and refinement I need to express that logic in a very conventional language such as C.
But planning ahead, I still define the function to fit within a state machine, to have defined inputs and outputs, and to avoid doing things that won't implement in hardware very well (like complex wanderings through main memory)
I now have a module that is suitable to be implemented in hardware or software. Since I can do either, I take the first draft in software.
By the time the code stabilizes I'll be confident that the algorithm is correct and I'll know how important optimization is to the overall performance of the system. I can now prioritize which modules are most worthy of translating into hardware.
With a soft core I can shift resources between "software" and "hardware" without having to re-layout the board, design new pinouts, etc. In other words, I actually can shift resources. Try getting a board layout changed on a successful product just to optimize things sometime.
If the "hardware"/"software" boundaries ever stabilize a lot, I can even consider going back to a conventional processor core and full hardware solution. More likely the market will demand totally new features by then.
Bottom line:
FPGA's can't handle the complexity for the programs we write today for general computer use
FPGA's are much more expensive in terms of power and cost than an equivilant processor/ASIC/specific purpose chip
FPGA's are exceedingly slow. In order to make them worthwhile, the hardware algorithm they contain must be massively parallel, or not require speeds that modern processors can attain - which leads back to the FPGA's cannot represent extrememly complex systems yet.
Those people who have an interest in both software and hardware tend to lean to one side or the other, and end up writing drivers for embedded systems, or designing hardware for embedded systems, very few actually participate in the whole enchillada because of the complexity fo the complete system
There's still a metric ton and many years of research work to be done behind the idea of a language that can be translated into both hardware and software
Before this happens you're going to see VHLL (Very High Level Languages) come into increasing use - languages which make it easier to program extremely large, complex, interconnected software systems using a small set of human resources.
Because, let's face it, hardware is freaking dirt cheap . You can go buy a computer now that has the processing power of a 5 year old supercomputer (though it can't quite manage the flow of information that supercomputer can handle, but that's a different discussion altogether)
-Adam