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Soft Processors in FPGAs?
cybergibbons asks: "We're students in the Department of Electrical and Electronic Engineering, Imperial College, and are carrying out some research for Altera into FPGAs, softcore processors, and hardware software co-design. Most embedded systems are a combination of hardware (for performance) and software (for versatility), and the design of these systems is getting more and more complex. Previously, the hardware and software was partitioned at the early stages of design, leading to sub-optimal solutions.
New languages such as SystemC and Handel C aim to merge the hardware and software design with one common language combining the high level algorithm design and low level RTL design ? the ultimate goal being to allow conventional C++ programs to be synthesized directly into working systems, without any human intervention. However, what we seem to have found is a lot of marketing spiel and conceptual papers with no practical ideas. Is anyone using any of these new tools? Are any of the current co-design tools any good? Do you think a computer can partition designs effectively into hardware and software? What features would you like to see in future tools? Do you envision any amazing new applications for FPGAs using new co-design tools?"
The Commodore-One Reconfigurable Computer
From the About page:
The Commodore One computer started off as a 2002 enhanced adaptation of the Commodore 64 -the most sold of any computer model (Guiness book of World Records) While retaining almost all of the original's capabilities the Commodore One adds modern features, interfacing and capabilities. The C-One fills a gap in the hobbyist computer market.
During development, it evolved into a re-configurable computer, a new class of computers where the chips do not have dedicated tasks any more. The two main chips carry out different tasks, depending on the needs of the program. The technology used is called FPGA - field programmable gate arrays. These chips can be programmed to do the tasks that the chips of the C-64 or other computers have done. It's no emulation, but it's a re-implementation of the chips that are no longer available since many years.
The one thing that is not contained in the FPGAs is the main processor - it would take too much space, resulting in too high cost. To maintain flexibility, the CPU resides on a card that can be exchanged by the user - as simple as plugging in a PCI card.
After a cold start, the FPGA programs are loaded from a mass-storage device like harddrive, disk drive or a compact flash card. What's described in one short sentence is a giant leap in computer technology: The hardware can be altered by the user without even opening the computer. The FPGA programs - so-called 'cores' - turn the C-One into clones of famous 80's computers like the C64, VIC-20, plus/4, TI-99/4a, Atari 2600, Atari 400/800 series, Sinclair Spectrum, ZX81, Schneider CPC and many more. It can of course also be a completely new computer with specs unknown to these milestones in computer history. That's what the C-One 'native mode' will be - read more on the Specifications page
The estimated price will be about 249,- EUR. The user will need to supply an ATX style case, ATX power supply, drive(s), PS/2 keyboard, mouse and SVGA capable monitor.
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Too cool!
I think you'll find that Handle C , System C, etc are not likely to be very popular with the run-of-the-mill designer. Most of these folks (me included) don't see the need for yet another design language. We get along fine with Verilog or VHDL.
There HAS been a need identified for verification constructs in the languages - Vera and E are examples of stand-alone verification languages that are used in conjunction with the RTL design in Verilog/VHDL. With the advent of Superlog/SystemVerilog these languages are being included within Verilog itself. This features the best of both worlds, i.e. old IP still runs, and new constructs are added to make verification easier.
So while there are a few adopters of SystemC, etc. I suspect they will fall by the way-side as SystemVerilog becomes a reality. It seems the EDA industry is going to back SystemVerilog above the other choices, and most designers seem to feel this is the best solution.
Have you compiled your kernel today??
System/Handel C[++] are languages with two good points.
They allow software engineers to design hardware with minimal training and secondly they allow fantasticly fast simulations. The ultimate system of you feed in an MP3 decoder writen in C and you get a player with software at the other end is years (I think more than 10) away.
C is not a natural language to describe hardware. It creates large slow designs with very little transparency to the generated design. Transparency is important as a small looking piece of C code will generate a large slow design while a larger code will generate a smaller faster design. While trasparency is partly implicit in computer programs (You have a vague idea as to what the compiler will generate from your code) in hardware it is very easy to be well off.
FPGA's are getting more and more popular and powerfull. There are allready numerous CPU designs available and the current methods of creating them (mainly verilog and VHDL) seem to be generating much better results than system C ones.
As for soft computers I really like the idea. I would not be surprised to see some FPGA parts on the next 3d cards or CPUs. They allow hardware structures to replace complex code (e.g. I was trying to write code which effectively can be dome with a piece of CAM. hash tables are just a method of emulating CAM in programs).
To conclude, Yeah C based methods will become more popular but only because menagement like them. They produce appauling designs but as silicon area becomes nearly free and in areas where speed does not matter and you need to do a billion simulation runs to test it then yeah it will show it self more attractive to software engineers trying to do hardware. But at the end of the day this is all cheating. If you want to design hardware you really have to learn what structures there are at the bottom level and only then when you know what your compiler will produce for you can you effectively make use of such languages. If companys can affoard to get proper engineers to make hardware they may fetch some C monkey to do it instead but I think if you want to become one then you are selling your self short.
Mouse powered Chips, Open source Processors and Lego
What I find intriguing about these systems is the possibility of starting with some custom hardware, and lots of C code to perform logic, and interface with the custom hardware.
Now, if I knew that interface was solid. I'd just want a processor and a custom systems chip that did the usual memory/peripheral interfacing and whatever my special functions required. If I wasn't all that worried about chip count I might even put the special logic entirely on the memory bus as a seperate device.
But more frequently I have some complex logic that I probably want to do in hardware, but I'm not certain and I'm not 100% certain that the algorithm is correct. For speed of development and refinement I need to express that logic in a very conventional language such as C.
But planning ahead, I still define the function to fit within a state machine, to have defined inputs and outputs, and to avoid doing things that won't implement in hardware very well (like complex wanderings through main memory)
I now have a module that is suitable to be implemented in hardware or software. Since I can do either, I take the first draft in software.
By the time the code stabilizes I'll be confident that the algorithm is correct and I'll know how important optimization is to the overall performance of the system. I can now prioritize which modules are most worthy of translating into hardware.
With a soft core I can shift resources between "software" and "hardware" without having to re-layout the board, design new pinouts, etc. In other words, I actually can shift resources. Try getting a board layout changed on a successful product just to optimize things sometime.
If the "hardware"/"software" boundaries ever stabilize a lot, I can even consider going back to a conventional processor core and full hardware solution. More likely the market will demand totally new features by then.
Sure they can! You can implement a general purpose CPU inside an FPGA; it would be slow and expensive compared to a real CPU, but it would be able to run any general purpose algorithm you can think of. There is no fundamental reason why you can't do anything with an FPGA, it all comes down to the PARTICULAR task at hand, and how best to accomplish it.
This is only true if you think of an FPGA as a replacement for a regular CPU, running regular software. But there are 2 easy examples of tasks where and FPGA is cheaper, and more powerful. The first is when you have several programs or ASICS that are only used one at a time, which you can replace by a single FPGA that switches configuration as needed. The second is for specialized software tasks that are rarely used, so they're not worth optimizing a general purpose CPU for, but used a lot in certain situations. An example is high volume cryptography -- you can buy a fixed function card that does the work for you, but what if a new algorithm comes out? You have to buy a new card! with an FPGA approach you can just update the functionality, and re-use the silicon to perform other tasks when you're not doing cryptography!
Another thing to keep in mind is that ASICS are only cheaper than FPGAs if you get into high volumes... In many cases off the shelf FPGAs are cheaper than ASICs until your product starts to sell in high volumes.
BULLSHIT!!! My 89 corvette is exceedingly slow too, I guess. I don't know where you get this idea from. The speed you get out of an FPGA is entirely a function of how you choose to design the circuit inside it. The bigger the design the greater the potential speed. FPGAs can run moderate designs in the hundreds of MHz, and not CPU-like single operation at a time MHz, more like completely pipelined, one datachunk fully processed per clock MHz.
Actually, FPGAs do better on tasks that are pipelinable and not just parallel, which basically includes all kinds of number cruching, and bit twidling.
You need to better define what you mean by complex systems. Nobody is advocating implementing powerpoint in an FPGA, researchers are trying to offload tasks that usually require specialized hardware to programable hardware, not replace cheap CPUs with expensive FPGAs for no reason.
My intrest in this area comes from the fact that when the hardware arrives, the software team and hardware team spend a few months blaming each other while the bugs are worked out. If they worked together they would have a competitive advantage by getting to market sooner.
And it's a metric ton of high paying, fun work, and I don't see anything wrong with that.
every _exit() is the same, but every clone() is different.
I've always wondered why Transmeta hasn't extended code morphing to other cores. Why not release a core than runs PPC code? Why not make a core than can run BOTH PPC and x86 code. Think about this. Apple could use Transmeta processors (since in the past they haven't been as fast as x86 processors anyway) but software like VirtualPC could run at the equivelent of full speed by using different codemorphing. Or you could do things the other way on the PC side. It would allow people to program on one platform and test on another nativly (not through software emulation of hardware) on the same PC.
I think making the code morphing system be able to do multiple cores on one chip could have a LOT of good effects.
Just an idea.
Comment forecast: Bits of genius surrounded by a sea of mediocrity.
Are these the processors they sell on late-night infomercials on ski^H^H^H Cinemax?
Tiller's Rule: Never use a word in written form that you've only heard and never read. You will end up looking foolish.