Codename Brutus: Chess-Playing FPGA PCI Card

rockville writes "Brutus, a FPGA add-in PCI card developed by ChessBase and Dr. Christian Donnegar, just dominated a strong field of human players at a tournament in Germany. It's the first serious chess-playing FPGA architecture since Deep Blue was disassembled after its victory over Kasparov in 1997. Pictures of the card and a short description are here."

Comments

Re:Slightly Off Topic

[greppling]

I am reluctant to give the answer, as every timechess programs come up on slashdot, someone has to make a post referring to Go:

Computers are still very weak at this Asian board game. And despite many people trying to make substantial progress with that. The best open-source one, GNU Go, is btw not very far away from the best commercial ones.

There is a Go Wiki with, among other things, a short introdcution.

Deep Blue was not dismantled

[phr2]

It's in the Smithsonian and the hardware is more or less intact. It's in the typical condition of a decommissioned computer, i.e. you can't just flip a switch and start using it, but there's some chance that the folks who built it could get it working again sometime. This is described in the book "Behind Deep Blue: Building the Computer That Defeated the World Chess Champion" by Deep Blue's designer F.-H. Hsu. Hsu later got interested in building a Shogi (Japanese chess) machine using FPGA's. He says with today's custom VLSI, the equivalent of Deep Thought could be built on one chip and mounted in a compact flash card. You'd put the card into your Zaurus or Ipaq PDA and have a grandmaster-strength pocket chess machine. He put some effort into commercializing such a device but couldn't get enough backing so he went off to greener pastures.

Re:FPGAs

[FunOne]

VHDL the language may not be specific, but to properly use/take advantage of an FPGA architecure it must be specifically targeted. Writing VHDL for implementation ( and not just simulation) requires targeting the specific final implentation (FPGA, CPLD, VLSI) and even the specific brand/type/etc.

FPGA designs require dynamic processes (so that they can be reprogrammed) and highly regular, repetative, and predicatable implementation. That does NOT make them easier to change process with. Unlike memory/processors that can be reclocked or relabeled, the FPGA needs to be as exact as possible to get proper functionality out of it.

If you want a good "Getting started with Hardware Design" I suggest attending a university for a Computer or Electrical Engineering degree.

Coding VHDL for HW implementation is NOT easy, its not just VHDL->Synthesis->DONE. There is tons of testing and retesting to determine if it synthesized right, if its timed right, if its functional under all inputs/circumstances. Getting a properly simulated and funciontal VHDL design (in the synthesizable VHDL subset that is) is only step ONE of a design. You then have to get a design that is still functional that will synthesize. Then you have to get a design that is still functional that synthesizes that performs correctly.

Its not the kind of thing that you can learn in 21 days from a Sams publishing book.