Four Core Processor to Bring Tera Ops

panhandler writes "As reported at CNet and the Austin American Statesman, researchers at UT are working with IBM on a new CPU architecture called TRIPS (Tera-op Reliable Intelligently adaptive Processing System). According to IBM, 'at the heart of the TRIPS architecture is a new concept called 'block-oriented execution"' which will result in a processor capable of executing more than 1 trillion operations per second."

Comments

Great....

[innosent]

Great... Just what we need, processors that can perform an instruction, then wait 40000 cycles for the next instruction to be read from memory. I wish we could see some memory improvements to go along with these.

Seriously, though, this will help break all the clustering records, provided we can come up with faster interconnects by then.

Re:Great....

[AlecC]

True, for general purpose computing, which is probably what most /.ers probably do. But this sort of massive processing power is really only needed for the simulation people, who do large amounts of contoguous number cruncong, such as matrix multiplies. That sort of thing will be speeded up enormously by this sort of architecture.

As a concept, this is hardly new. There have been all sorts of different parallel processing architectures over the years - SIMD, MIMD, strings, arrays, etc. Each has performed well on one particular class of problem, but generally crashed out as soon as you move away from its sweet spot. For example, changing gear from array mode (lots of big matrix ops) to linear mode (making decisions on the results) tends to lose most of the time gained by the array processor. OTOH, clusters of general purpose processors tend to wast time on memory or object contention unless they are working on highly decomposable problems.

Maybe this architecture is a better compromise that its many predecessors. (It ought to be - IBM built enough of them). But don't expect to use them youself, unless you work for an advanced engineering company, a weather forecaster or the DoD.

Thank God

[(outer-limits)]

EPIC is clearly dead in the water. Intel didn't learn from the 432.

Fabrication

[Anonymous Coward]

Does anyone remember the Pentium Pro? It was an extremely expensive processor. This was because of its strange system of connecting the CPU core with a massive amount of cache ram; production yields were very low, so fabrication costs were very high.

Imagine how high the failure rate would be with fabricating a CPU with four cores... I don't see how it would be practical unless it was with an extremely-high yield design such as the StrongARM.

Re:Fabrication

[Phishpin]

Marketing a chip that has a product defect doesn't sound so great to me, even if the chip performs flawlessly with a broken core or two.

IBM: "Well, all our chips are made with 4 cores, but some of them get made broken, so we sell those for less as if they were only made with the number of cores that work"

Customer: "I wonder what Sun and Intel are up to these days."

Oooh, can't wait for the G6!

[Capt'n Hector]

But of course, these processors will require entire software rewrites.

But this reminds me of a growing trend, and that is that as soon as large infrastructures are finally completed (be it the transition to OS X or 802.11b) the technology becomes obsolete. However, the entire infrastructure must be replaced. I don't care how many gazillion flops this or any other processor can pull. They need to easily scale so that the entire infrastructure does not need replacing.

We'll need a lot better compilers

[kramer2718]

If each chip is basically four processors each of which can execute 16 operations simultaneously, it will be difficult for compilers to find 64 independent instructions to execute each cycle.

I guess one possibilty could be to execute instructions from four different processes simultaneously, thus reducing the probability that the instuctions will interfere.

Re:We'll need a lot better compilers

[Alain Williams]

• it will be difficult for compilers to find 64
• independent instructions to execute each cycle

The problem is that the word independent is the wrong one.

It depends on what sort of work you choose to do on this sort of beast, finite element work (simulations, etc) involves the same operation on lots of values over and over. This is how Cray made his money years ago.

This is not a desktop machine for you to do office automation on, quake maybe, but not word smithing.

Expensive

[White Rabbitt]

It seems cheaper to me to simply make larger clusters of computers with more processors than to redesign processors. For example, why don't IBM and UT team up to design an 8-processor Itanium motherboard or something?

First, they don't spend money reinventing the wheel. Second, hardware production failure rates are reduced because if an eighth of all cores fail, you don't average zero production. Third, most of the code is already written for multithreading with multiple processors. It would probably be cheaper to build larger facilities than to design mulitprocessor processors.

IBM can work with the Japanese

[Mostly a lurker]

Have you noticed that big Japanese companies seem comfortable working with IBM? I find it difficult to think of any other large US corporation about which we can say the same. IMHO, it is because (while a hard nosed competitor) they deal in a straight fashion with partners. They are seen as trustworthy.