Is Prescott 64-bit?

unassimilatible writes "According to The Inquirer, Intel's new Prescott has 64 bit instructions lurking inside. Could really rain on the parade of those who thought the new Athlon 64's would be supreme - especially when you look at Intel's price roadmap. Don't run out and buy an Athlon 64 just yet..."

Comments

Re:IInntteerreessttiinng

[Waffle Iron]

You're guess is basically on the right track. I don't want to violate any NDAs, but let me just say that the AAA and AAS opcodes will now support Unicode.

No, it isn't

[Groo Wanderer]

As the author of the article, I had to REALLY make things vague. The people involved would be hurt badly by Intel if their names got out. Some of the situations that were told to me make it quite apparent who was leaking. That was as specific as I could make it :(.

-Charlie

Re:Performance doesn't come directly from 64 bits

[scheme]

Itanium is a full fix to the problem. The horrendous x86 ISA is completely replaced by an explicitly-parallel (EPIC) instruction set that has all the nice properties of a RISC machine (easier to compile for, less stress on the memory system as you get 128 registers, easier for the machine to decode the instructions as they're fix format and don't require RISC conversion, etc.). The problems with it are:
1. You need a compiler that "knows" how to bundle instructions effectively (a VLIW-compiler). GCC clearly isn't there yet (it's not uncommon for the intel compiler to beat gcc by 30->50% when running computationally-intensive stuff)
2. Being completely different than x86, it can't be very efficient at emulating x86 programs.

The Itanium ISA is elegant an and clean in some places but in others is an ungodly mess of complicated things. Take the register save engine (RSE) for example. It's supposed to handle spilling registers to the stack and loading them to the stack. This includes handling page faults, exceptions, interrupts, and memory errors. Oh yeah, this is supposed to be automatic and handled invisibly by hardware without software intervention. Hasn't happened yet.

Also the EPIC ISA that the Itanium uses isn't easy to compile for. This is one of the biggest problems with the Itanium. It requires compilers to pull out a lot of parallelism in the code and present that to the hardware for execution. Intel sort of glossed over this when introducing the Itanium about 10 years ago and the compiler technology hasn't been able to really do this. So although the Intel compiler is better than gcc, it still isn't all that great.

Incidentally, the Itanium does a better job at emulating the x86 ISA in software than in hardware. It was a big deal a few months ago when Intel introduced a software x86 emulator that offered a dramatic improvement over using the built in hardware emulation.