UIUC Creates World's Fastest Transistor Again
An anonymous reader writes "The University of Illinois has developed (again) the world's fastest transistor operating at over 500 GHz. They used an indium phosphide based wafer, and super-scaled dimensions. The device kind of looks like a spaceship." Milton Feng, the professor in charge of the team behind the transistor, admits that their ultimate goal is a terahertz transistor, which given their previous achievements, doesn't sound too lofty.
Sweet, now the 250 Ghz's will be totally affordable.
When I started designing hardware circuits, the world was much more beautiful. You could understand everything that your small micro-processor based system did, downto the function of the BJTs in the TTL devices down there... Then Intel started the 1GHz race and I had to learn a great deal of RF techniques to just design my next PCB. And now 500GHz?!!! At this rate, a few years later I'll have to learn more about RF and then eventually optics than next hot FSM synthesis algorithm! I guess I'd better change my job, start something more calm and steady, like paiting or ...
From the article:
150 nm, 382 GHz
100 nm, 452 GHz
75 nm, 509 GHz
At their current rate of improvement, a 680GHz device will have a collector size of 0 nm. Just imagine what will happen once they manage negative sizes!
"They redundantly repeated themselves over and over again incessantly without end ad infinitum" -- ibid.
The University of Illinois has developed again the world's fastest transistor operating at over 500 GHz
If only they had documented the damn thing, they wouldn't have to develop it twice!
."The steady rise in the speed of bipolar transistors has relied largely on the vertical scaling of the epitaxial layer structure to reduce the carrier transit time," said Milton Feng, the Holonyak Professor of Electrical and Computer Engineering at Illinois, whose team has been working on high-speed compound semiconductor transistors since 1995. "However, this comes at the cost of increasing the base-collector capacitance. To compensate for this unwanted effect, we have employed lateral scaling of both the emitter and the collector."
I mean, that's just blindingly obvious.
At 1 THz, it will take more than 40 clock cycles for a signal to move across a 1/2 inch die of the CPU. And it will take 320 clock cycles for a round-trip to a memory location just 2 inches away. (And that is assuming the signals travel at the speed of light in a vacuum, not the slower speed found in metal traces or optical fibers.) Should make it interesting for chip designers.
Two wrongs don't make a right, but three lefts do.
It seems like every time an article like this is on slash dot a million people say "wow I can't wait for a computer using that technology".
What people _don't_ understand is this is not the same technology as is used in a microprocessor. CPUs used Field Effect Transistors. The advantage of FETs is that there is no gate-drain current when the transistor isn't switching so they take very little power. With a bi-polar transistor, you are using a current switch, which would take massive amounts of current if you put many of these into an IC.
A more realistic application would be in communications systems where your carrier frequency is at 500Ghz.
Sorry to burst your bubble but you won't see 500Ghz computers next year. Maybe not ever using CMOS.
Ah, grasshopper: when you understand that the answer is "both" and "neither," then you will be on the path to entanglement.
taken! (by Davidleeroth) Thanks Bingo Foo!
y=3000/x^0.4
where x is size (nm), y is speed (GHz). 1000GHz will be reached at ~15nm.In theory there is no difference between theory and practice. In practice there is. - Yogi Berra
You use the transistor to build a ring oscillator and measure the resulting frequency, then divide by the number of stages.