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NVRAM With Disordered Assemblies (Smaller/Cheaper)
chadjg writes "
Jim Tour, of Rice University says "Our research shows that ordered precision isn't a prerequisite for computing. It is possible to make memory circuits out of disordered systems." The article on www.e4engineering.com says the team has made "NanoCells", self assembled devices made from gold nanowires and organic conductive molecules. These NanoCells are the first devices of their kind to be made into working microelectronic devices, apparently." Yep. Let an untold number of machines try to create NanoCells, and statistics says you'll find the most efficient kind.
Is this a step towards creating quantum-effect neural networks (i.e., thinking machines)?
Peace and love, y'all
I Predict that 95%+ of the Slashdot crowd doesn't understand more than 2 words of this, yet will pretend to understand it.
One problem inherent in disordered structures is the inherent differential cross-coupled field tensors present in a non-homogeneous layout of bipolar, dipolar, and unipolar electrical field vectors. These differential tensors lead to random non-unique ionization of co-recombinant carriers and de-ionization of unique co-recombinant carriers. These random ionizations and deionizations manifest in a statistically significant increase in error vector magnitude during bit placement and deplacement, and transfer. It is because of this that highly ordered systems are required for reliable nonvolatile memory arrays.
A million monkeys were originally hired to conduct this study, but the combined might of animal rights activists and the high costs of bananas prevented it.
Contrary to popular belief, you have to pay bananas, not peanuts, to get monkeys.
There's not enough detail in the article to even say "gee whiz." Could it be that these guys haven't published yet, and wanted to generate some pre-publication buzz without giving away anything?
Some of the more interesting bulk nanochemical processes create fairly ordered 1-D patterns (like zebra stripes). I'd bet that people are working to create orthogonal 2-layer structures of 1D patterns to create a nice lattices. Sandwich in the appropriate inter-layer, splice in connections at the edges and you have the makings of a 2D array of memory locations.
Nanocore memory anyone?
Two wrongs don't make a right, but three lefts do.
This is because if you did, you would realise that it was very well written and not hugely technical. I wouldn't be supprised if 95%+ of the slashdot crowd did understand it.
As a general rule, slashdotters seem to get very zealous and have a habit of not RTFAing, but they generally have good comprehension skills and I don't think you give them the credit they deserve.
When Argumentum ad Hominem falls short, try Argumentum ad Matrem
Yep. Let an untold number of machines try to create NanoCells, and statistics says you'll find the most efficient kind.
Actually, I think it would be more accurate to say that statistics says [sic] you will find a number of answers, some with better performance than others.
rand() is a poor optimiser.
But what is the SIGnificance?
The article lacks useful information on the expected density of the circuits in large-scale applications. On the one hand, the nano nature of the device would seem to permit tremendous density that far exceeds anything that can be fabricated with masks and etching. On the other hand, two major major problems would limit the practical density of memory cells in usefully large dies.
1) I would expect these devices to have a very large fraction of unusable cells. A fair percentage of nanocells would probably be fixed live (always storing a 1), fixed dead (always storing a 0), leaky (decaying faster than the nominal refresh time), or disconnected. The percentage of writable, readable, nonvolatile, connected cells might be very low. This makes the effect density (and effective memory cell size) much worse than the nanoscale of the process would lead one to expect.
2) The reach of the disordered connections into the field of nanocells would be limited in distance. I would bet that the disordered wires cannot be made to reach very far from the edge. Phenomena like wire-to-wire disconnects, wire-to-wire shorts, wire-to-substrate shorts, accumulated resistance, accumulated leakage would limit how far from the edge we can access the field of nanocells. Note that the experimental cell is only 10 microns by 40 microns. Can this technology be scaled to a 1000 micron x 1000 micron die or bigger? Even if the density is extremely high, the inability to scale to size might mean that all we can do is an extremely small 64 kilobit device. Of course, this might be solvable with clever overlays (like a mesh of traditionally fabricated conductors) that let us create macroscopic nanoRAM dies that have scale-limited microscopic nanocell field areas. The statistics of interconnections (or percolation theory) can help us determine the scalability of the concept.
I'm not suggesting we abandon nanocell technology, only that we consider the scaling effects when trying to predict whether this nanocell technology has the potential to revial existing technologies. Moreover, the existing semiconductor technologies are a moving target. By the time nanocells reach the market, we might have 3 nanometer semiconductor circuits using gamma-ray free-electron lasers and vertical ion implantion in a diamond substrate (or something). Future semiconductor densities might makes the nanocell density not that competative.
Two wrongs don't make a right, but three lefts do.
This might seem really dumb, but surely this is self evident to some degree. After all, isn't that what our mind does on regular basis? Evolution has beaten us to the punch and created a self-assembled, disordered system: Our central nervous system.
The description of the system in the article with islands of gold foil and connections of nanowire seems very vaguely analogous to neurons with cell bodies and axons... I wonder if the system functions in a way similar to a group of neurons...
I don't dispute that this is a great discovery, but there's a difference between the chemistry of the process and the chemical engineering for the process. One can reproduce conditions in a lab environment, whereas the other is designed to take the process into mass production. I've seen so many unique technologies in the last few years that are great ideas but don't necessarily translate to something that can be mass-produced. Materials and process costs, materials handling, integration into production lines, packaging, built-in self-repair strategies and off-device drive are all pretty important factors, yet I really didn't see a whole lot on this in the article.
The other factor is reliability, both in the short term and the long term. Yes, the device seems to retain memory for a week without power at room temperature, but what about other factors? Alpha particle and EM sensitivity, thermal cycles and other long-term reliability issues all have to be investigated. Before I get jumped on, let me give a concrete example of a new technology: low-k dielectric. Low-k dielectrics (SiLK, Coral, Black Diamond) are materials on silicon devices used as insulation between layers of wires that connect circuits and were hailed as miracles a few years ago. However, many manufacturers (most notably TSMC with Nvidia) were having major problems where they would have void formation failures at the vias or inter-layer connections. The scariest part is that these were forming in simulated long-term accelerated tests, implying failures in the field after several years! Now, these failures have supposedly been addressed, but that's a concrete example of reliability issues with a conventional technology.
We need to tread lightly towards radical new technologies if only so that we don't get burnt down the road. I definitely believe there's room for these types of technologies, but the most essential parts of these reports are so often missing because the focus is on getting this to work in a lab, not on making money. And, as someone who worked in the field of technology commercialization in the past, it's sadly more often the case than not.
Admittedly it's a more productive approach than just saying "consciousness is intractable" and heading down to the bar or philosophy library (equally productive destinations). But it doesn't really explain anything, it just points to a new system (quantum tunnelling rather than electrochemical activity) that's harder to observe and understand.
I can't claim to have studied it in any depth, though, so if anyone can better expand on the state of the art I'd be very interested to read their comments.
But so far, the fab-technology people have always caught up, fixed the defect problem, and made it possible to produce perfect parts with high yields. None of those techniques have been used much in production products.
Right now, fab technology is ahead of device physics. It's possible to fabricate smaller transistors than can be made to work. Power dissipation is more of a limit than line width. So at least on flat silicon, we don't need this yet.