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Intel Researchers See Moore's Law Becoming Obsolete
prostoalex writes "A paper, published by Intel researchers, claims we might be the witnesses of Moore's Law becoming obsolete, as the rate of shrinkage for transistors goes lower with each year. In 2018 we might be able to get the chips manufactured with 16-nanometer technology, then one or two more manufacturing processes will shrink it even further, but after that we're facing the physical limits."
Silicon is, indeed, close to its limit, but that does not mean semiconductors are.
This Wired article, which I'm sure many of you have read, details how new industrially-produced diamonds, thanks to their cheap price and purity (most importantly, being absolutely identical to each other), along with research done by both the government, several corporations, and possibly Intel, may make unbelievably fast systems powered by diamond semiconductors possible.
Some interesting quotes:
Also, a rather ironic one from Intel themselves:
Silicon is dead. Long live diamonds!
looks like they're gotting slashdotted like Kathleen Fent on her wedding night...
Dec. 1 -- Moore's Law, as chip manufacturers generally refer to it today, is coming to an end, according to a recent research paper.
GRANTED, THAT END likely won't come for about two decades, but Intel researchers have recently published a paper theorizing that chipmakers will hit a wall when it comes to shrinking the size of transistors, one of the chief methods for making chips that are smaller, more powerful and cheaper than their predecessors.
Manufacturers will be able to produce chips on the 16-nanometer manufacturing process, expected by conservative estimates to arrive in 2018, and maybe one or two manufacturing processes after that, but that's it.
"This looks like a fundamental limit," said Paolo Gargini, director of technology strategy at Intel and an Intel fellow. The paper, titled "Limits to Binary Logic Switch Scaling -- A Gedanken Model," was written by four authors and was published in the Proceedings of the IEEE (Institute of Electrical and Electronics Engineers) in November.
Although it's not unusual for researchers to theorize about the end of transistor scaling, it's an unusual statement for researchers from Intel, and it underscores the difficulties chip designers currently face. The size, energy consumption and performance requirements of today's computers are forcing semiconductor makers to completely rethink how they design their products and are prompting many to pool design with research and development.
Resolving these issues is a major goal for the entire industry. Under Moore's Law, chipmakers can double the number of transistors on a given chip every two years, an exponential growth pattern that has allowed computers to get both cheaper and more powerful at the same time.
Mostly, the trick has been accomplished through shrinking transistors. With shrinkage tapped out, manufacturers will have to find other methods to keep the cycle going.
These issues will likely be widely discussed this week, when the International Technology Roadmap for Semiconductors is unveiled in Taiwan. The ITRS, which is comprised of several organizations, including the Semiconductor Industry Association, outlines the challenges and rough timetable for the industry for 15 years. A new version of the plan will be released in Taiwan on Dec. 2.
Still, Gargini said, researchers are exploring a variety of ideas, such as more efficient use of electrons or simply making bigger chips, to surpass any looming barriers. Other researchers likely will dispute these conclusions.
"We cannot let physics beat us," he said, laughing.
THE DISTINGUISHED CIRCUIT
The problem chipmakers face comes down to distinction and control. Transistors are essentially microscopic on/off switches that consist of a source (where electrons come from), a drain (where they go) and a gate that controls the flow of electrons through a channel that connects the source and the drain.
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When current flows from the source to the drain, a computer reads this as a "1." When current is not flowing, the transistor is read as a "0." Millions of these actions together produce the data inside PCs. Strict control of the gate and channel region, therefore, are necessary to produce reliable results.
When the length of the gate gets below 5 nanometers, however, tunneling will begin to occur. Electrons will simply pass through the channel on their own, because the source and the drain will be extremely close. (A nanometer is a billionth of a meter.)
Gargini likens the phenomenon to a waterfall in the middle of a trail. If a person can't see through it, they will take a detour around it. If it is only a thin veil of mist, people will push through.
"Where you have a barrier, the electrons penetrate a certain distance," he said. "Once
From Intel's website: "Moore observed an exponential growth in the number of transistors per integrated circuit and predicted that this trend would continue. "
To be a tiny bit pedantic, Moore's original paper talked about the number of transistors per integrated circuit at any given price point. You can always stick more transistors on the chip if you're willing to throw sufficient amounts of money at the problem, but to get those transistors for a reasonable price is another matter.
FWIW, Moore's original hypothesis was that the transistors/$ would double every 12 months, so his "law" hasn't been correct for quite some time. We had been seeing a doubling of transistors about every 18 months for a while, but now it's more like every 24 months. With the current troubles that Intel, AMD and IBM all seem to be having at implementing their new 90nm manufacturing process, it seems likely that the pace will continue to slow.