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Open Source Finally Hits Real Silicon
pagercam2 writes "While Open Source software has many success stories, hardware and particularly chips haven't had as much. While there have been multiple Open Source projects, none have come to a final product until now. The OpenRISC 1000 has been implemented by Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products) along with PCI, 10/100 Ethernet, serial, GPIO etc. ... Details and pretty pictures available at OpenCores.org, and it even runs uClinux. Good Job!"
It's all an attempt by these linux people to control the entire machine from the ground up. Don't trust them, they've let you down in the past.
So what's Sparc V? Swiss Cheese? Sparc specs have been available for a LONG time.
Javascript + Nintendo DSi = DSiCade
If they make money with this and other chip fabricators get on the open source boat then perhaps one day we'll see an entire open source chipset and motherboard combo. No "SecureThisBIOS" and "TrustedThatOS" needed.. That would be damn sweet.
Trolling is a art,
... really is this some sort of sick joke?
What's the roadmap from here for these open core processors? Is there one?
I have been pwned because my
let the jokes about what sort of processor runs their webserver thread here...
Keep your packets off my GNU/Girlfriend!
This is indeed a good step for the Opencores project, but the subject itself is misleading.
The LGPL'd SPARC-compatible processor Leon was put to silicon a long while ago.
Give credit where credit is due, the Leon tracked over this territory years before OpenRISC.
Karma Whoring for Fun and Profit.
>>Flextronics Semiconductor(a division of Flextronics, the contract manufacturer possibly best known for its production of many Cisco products).
m l
Flextronics would actually be best known for being the main manufacter of the Microsoft Xbox.
http://www.wired.com/wired/archive/9.11/flex.ht
Project: OpenRISC 1000
Silicon Implementations
Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.
Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz. The SOC features:
* OR1200 processor
* Memory Controller (FLASH, SDRAM, SRAM, DPRAM)
* PCI 2.2 32-bit interface 33/66MHz
* Ethernet MAC 10/100
* UART16550
* GPIO
* JTAG/Debug Interface
The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.
Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board.
Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.
This board was the first prototype built (not fully assembled at the time)
Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock.
Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.
Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.
IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.
-- john
Project: OpenRISC 1000
Silicon Implementations
Several companies are making silicon implementations (ASICs) of OR1200 using different library vendors and foundaries, process geometries from 0.35um to 0.13um. For references contact lampret@opencores.org.
Here is an example of System-On-Chip (SOC) from Flextronics Semiconductor. It is a 32-bit general-purpose microcontroller implemented on UMC 0.18um targetting embedded applications with maximum clock frequency of 160MHz.
The SOC features:
The OR1200 is implemented with 8KB instruction and 8KB data caches, I/DMMU with 64 TLB entries each, power management unit, debug unit, tick timer and interrupt controller. Its 32x32 multiplier is coupled with a 64-bit MAC unit.
Test board for testing the SOC has 64MBytes of SDRAM, 32MBytes of FLASH, RS232 transceiver, Ethernet 10/100 PHY. Connectors are for RS232, Ethernet, JTAG/Debug and several Mictor logic analyzer connectors. The board has its own DC/DC regulators for 3.3V IO power supply and 1.8V core power supply. It can be used as stand alone board or as PCI standard form plugin board. Software running on the SOC is Embedded Microcontroller Linux (uClinux) with a console on serial RS232. The console shows a network ping to a local network host - the ping shows the Ethernet 10/100 capability.
This board was the first prototype built (not fully assembled at the time)
Dynamic power of the entire test board is 1.4W. Dynamic current of the SOC IO power supply is 52mA (3.3V) and dynamic current of the SOC Core power supply is 86mA (1.8V). These are nominal values measured at 100MHz system clock. Maximum system clock frequency of the SOC is 160 MHz. System clock is used to clock not only the OR1200 processor but the entire chip (exception is memory controller which can also run at 1/2 system clock). Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core.
Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor. IMPORTANT NOTE: For a live demonstration of the SOC in Silicon Valley, California during Dec 8th 2003 and Dec 15th please contact Damjan Lampret.
Chas - The one, the only.
THANK GOD!!!
Or, I'm just being fanatical and ranting about nothing, whatever.
- A
The development is naturally going to take longer for a finished product - nobody's going to release alpha (or even beta) silicon.
After all, you really don't want to have to submit a critical bug patch when the first mass run of chips is half-done... (Or the coder whose bug it fixes!)
"'I pass the test,' she said. 'I will diminish, and go into the West, and remain Galadriel.'"
- JRR Tolkien.
In general, what problems would there be in creating open-source engineering designs for hardware of all kinds branched off from off-patent intellectual property? That, as it turns out, was the express purpose of the US Patent system as conceived by Benjamin Franklin, unless I am mistaken.
Then anyone that uses an unapproved 'open' system, be it hardware or software, will be jailed if caught..
Dont laugh, its comin... The hints are already in the air.
---- Booth was a patriot ----
Just my two cents...
Procrastination sucks.
in the first place? Surely it was not out of the goodness of their hearts. What sectors are they targetting for this chip?
"Can anyone seriously point out some practical applications of this processor?"
Sure.
For chips derived from this test SoC:
MP3player
VoIP hard phone
Network Router
Firewall
Wireless Access Point
DVD player
Car stereo
Cell Phone
PDA
For uClinux:
It's all around you, many of the products _you_ use every day run it. Just because you think Linux means servers and desktops doesn't mean that's the only place it's widely deployed!
J
This fills a need for many consumer solutions that will have their cpu emebedded, similar to what VIA does with EDEN or C3. Most users have no idea of the clock speed of the cpu in their satellite tuner or DVR. I assure you many engineers that pick CPU's for systems will be glad to have this as a choice...
~8^]
Just FYI, this guy's a troll. Check out his recent posts. Apparently he's also "in middle management at Honda". I highly doubt Apple are considering OpenRISC for the iPod.
Bad troll. Bad.
Sailing over the event horizon
...their server is running off one of these since its already Slashdotted.
Because if so how do a download a free copy? Or does it get sent in the mail if i fire them an email? Does one pay postage as well? This IS opensource right? I just want the free stuff.
Jonathanjk.com
Didn't you hear? Honda is purchasing Apple. I work in middle management at Hopple MotorComps, so you can believe me.
where can I get the tarball and compile the sources by myself ?
Proof of concept?
I AM using this processor in a commercial product. I have to be sincere about this, its tremendous value for money(!) and its reasonably bug free, but the architecture and code quality are about a 3 out of 10 against its peers in the embeded world. So saying that both LEON and OpenRISC have indeed brought some momentum to the space of free (as in the Stallman definition) hardware and for that alone if nothing else we should all be pleased.
Judging from the specs included at the linked site, this core compares favorably with CPU cores from ARM, NEC and others who make big bucks selling (and supporting) these cores for system integration. This is interesting, and it's maybe even more interesting that I haven't noted it in any trade journals (did I miss it, or has this thing been going on under the industry radar?)
However, it seems like the CPU core itself is open-source, while a lot of the bonus features on the SoC (System On a Chip) example cited are IP from Flextronics (the the company that did the physical design for this open-source CPU core, which was manufactured by UMC). I can't tell for sure because the site is slashdotted already. The links on PCI, JTAG etc. would presumably tell if all these IP macros (besides the CPU) are open source also -- does anyone know for sure?
Either way, the specs on the sample chip are interesting: SoC with OR1200 CPU implemented by Flextronics Semiconductor: 32-bit general-purpose microcontroller, UMC 0.18um fab process, maximum clock frequency of 160MHz. This SoC contains (1 each I assume): OR1200 processor, Memory Controller (FLASH, SDRAM, SRAM, DPRAM), PCI 2.2 32-bit interface 33/66MHz, Ethernet MAC 10/100. UART16550, GPIO, JTAG/Debug Interface.
BTW, 160MHz is pretty darn good, until you see that 160MHz is not really "MAX" as in "max (worst-case) operating conditions" as one usually specs these things. Usually, when a spec says "maximum clock frequency", it means that you can safely run the part at these speeds under the entire range of allowed operating conditions (temperature and voltage). It's rather meaningless to tell the fastest it canpossibly go (which would be 0Kelvin, with a voltage almost high enough to fry the cip), so wpecs tend to tell you the max safe speed.
That would be the highest temperature (usually ~70C, but it's really based on the junction temp, which is calculated from ambient temp, airflow, and package thermal characteristics -- higher than 25C in any case, since that's usually called "typical"), lowest voltage (usually nominal minus 5% or 10%; so for 3.3V system, worst case voltage would be 3.3-0.33=2.97V, for 1.8V core it would be 1.62V), and slowest process from the fab (whther this is the case or not is unspecified in the list). Instead, lower down the page I see:
Max system clock 160MHz was obtained at 25C ambient temperature, 3.3V IO and 1.8V core
I could take a wild guess and say the thing would run at least 125MHz (respectable for the tech at hand), so calling it 160MHz (but not at worst-case conditions) is a little odd, or at least non-standard. If it were a "normal" industry player quoting me a part's clock rate that way, I'd become very, very suspicious of them for the rest of the negotioations.
It's still way cool, and if those IP cores are all available open source also, I'm really excited. But, I still have a lot of unanswered questions that I expected to see at least a brief mention of:
- Is a hardware/software co-simulation environment available?
- If so,what simulators and languages are supported?
- What support model(s) are available for design teams considering this core?
- What is the die size for the SoC made by Flextronics?
- How much is Flextronics selling these SoC's for, or are the ASIC (customer-specific)?
I guess I could do as the article suggests and call or email Flextronics:Test boards are available to Flextronics Semiconductor ASIC customers. For more information about the test boards, the SOC technical details and business engagement please contact Flextronics Semiconductor.
everything in moderation
funny, two days ago you worked at Honda.
Must be tough working two big jobs like that.. 'middle management' at Honda and a systems designer at Apple.
Part of what makes Open Source hardware important is that Open Source designs are what will actually be implemented as small scale manufacturing becomes more practical. There are various proposals around for doing manufacturing of chips using rather different processes than we are used to today(i.e. "growing" chips in a chemical medium). What these ultimately take us towards is robotic infrastructure that can be remotely controlled and is as "self-replicating" as a lathe or a blacksmith's shop.
Grandparent is just a hippy pipe dream.
...because I, and many others, would rather run linux on a 160Mhz processor than MS Windows on a 5.03G processor.
Sera
Slashdot, where armchair scientists get shouted down and armchair theologians get modded up.
That's a really big deal in most cities in developing countries, which are choking under smog levels that make LA look like Alaska.
Any sufficiently advanced technology is indistinguishable from a rigged demo
--Andy Finkel (J. Klass?)
I guess I'd have to take your word for it that Apple is being bought by Honda because your dad's a private plow contractor (were you hired by Gates to muck around /.?)
"Embedded" doesn't mean "small". A cable set-top box, a DVD player, a vending machine, a map display in a new car and an MRI scanner are all "embedded".
sub f{($f)=@_;print"$f(q{$f});";}f(q{sub f{($f)=@_;print"$f(q{$f});";}f});
Maybe we could develop our own GPU and put an end to all this binary nonsense once and for all.
http://www.tapr.org
Real SUV's don't have cupholders
It's 5:42 A.M., do you know where your stack pointer is?
When the dust settles, you can look at the roadmap.
Squinting at the thumbnail, I can make out an OR1100 (a stripped-down OR1200 with no cache or MMU) and OMP (up to four OR1x00 cores with up to 256/256 KB I/D cache) branching from the OR1200. From the OMP will come the OR1400, a 64-bit superscalar design with 64/64 KB I/D cache.
Note that the roadmap shows OR1100 and OMP in 2002 and OR1400 apparently in 2003.
for that link in the 2nd paragraph, hits the point methinks
605413? Yes, it's a prime.
"What makes his designs important IMHO is that they are very simple compared to conventional chip designs-which makes them appropriate for things like very low power consumption and makes it possible for one person to understand/implement their design."
The Harris RTX-2000 was a stack-based processor.
I have to admit, I was down with the terrorist communist nazis until they started killing puppies.
wow, I couldn't believe anyone could have their own head so far up their ass..
/. readers, we've been around long enough to take comments like "I'm on the iPod design team at Apple" and do a little background research.. this didn't entail a formal inquiry to Apple's HQ, it was actually pretty simple to click on his name, and read a few of his (your?) top5 most recent stories.
like most
Someone that is careless enough to make up stories about where they work, post them on the same messageboard, a week apart.. deserves to be told he's a fucking moron.
btw: I got laid this morning too.. by a woman though...
Just because you like getting your ass pounded by obese gorillas, doesn't mean you should shout it from the rooftops.
Dynamic power of the entire test board is 1.4W.
Is this correct? Transmeta might have some real competition here.
...therefore it must be good?
Before everyone sings the praises of Flextronics, keep this in mind:
Flextronics also makes the famous XBox for Microsoft in their Guadalahara Mexico facility. I just listened to a special on NPR about globalization and NAFTA and an economist was saying that without NAFTA the XBox would cost $400.
Your Cisco routers would probably cost more too, but I'm not sure if the cheap prices are worth it for the loss of US jobs.
"When the president does it, that means it's not illegal." - Richard M. Nixon
He has proposed that putting 100s of his chip on a single die would be a good idea. With his present design that is just not a good idea though. In it's present form it is just a poor design for that kind of parallelism (the lack of computational resources creates too much delay, which increases storage needs to get good utilization which isnt available ... it's just a poorly balanced design for parallel processing). It is only usefull for competing with the likes of PIC and other minimalistic micro-controllers.
Make it 24 bit at least, put in a stack overflow interrupt and a single cycle MAC (yes I know it will be as big as the rest of the processor, who cares). That would be slightly more interesting (although merely having a good core doesnt solve the huge task of designing the rest of the architecture to be able to do some usefull work with them, for instance on chip memory and interconnect).
She laid you huh? Next time get her to whip off the strap-on and plug her one yourself
In latest news, McBride is claiming to have invented the integrated circuit
It also runs linux and it's not huge by any meassure....
maybe im missing something here, but i dont see how open hardware could ever be as successful as open source software. why? because the hardware required to build software (ie: a computer) is a commodity in most of the developed world. how many people own machines capable of producing microchips?
i always felt that the power of open source lies in the fact that if you know how to program, you can make changes to the software yourself. now if i somehow got a hold of a schematic for my processsor and managed to improve the design, how would i go from paper to silicon?
Gyrate Dot Org - "Where high-tech meets low-life"
It's all around you, many of the products _you_ use every day...
I only caught the last sentence as I was scolling down, and I almost thought you were going to tell me that these Open source chips are opressing me for my electrical properties and I am a slave to some sort of artificial consctuct.
Thank God you were only talking about open source ships that could be so superior in their design one day thet they could acheuve a state of consciou...er...eh never mind
--
This represents a branch point from the First World industrial paradigm of economy of scale and elimination of manual labor, coupled with planned obsolescence and faddishness to ensure a short interval between new car purchases. An open-source car reverses this drastically. Low economy of scale and higher manual labor content coupled with an open-ended product lifetime shifts the focus from the manufacture of the car to that of its components. The car owner repairs the vehicle over a period of many years, possibly turning over the majority of its components one or more times over a long period of time. Small-scale manufacturers would build a mix of components based on demand for specific versions of a component. Clever management of the project should consciously support this. This business model is unsustainable by massive industrial concerns, but might work well in an economy with lower-skilled, small-scale enterprise. It would not be massively profitable, but may be a model for keeping large populations employed.
If the interconnection ot the automobile's components is carefully and thoughtfully evolved, a single vehicle might be an ever-changing machine, gradually absorbing better components over time. It would not be a static piece of technology that quickly becomes obsolete. This is a subtext of my original post.
you just made it into my "big-file-o-wise-quotes".
Thanks.
Your questions are all perfectly logical in the context of the traditional semiconductor design process, but reading them gave me an insight: open source IP cores have all the markings of a disruptive technology. They are too slow/low-quality/unsupported to be usable in traditional markets, but they are much cheaper and could enable new applications that don't exist today. And eventually they may start to eat away at the low end of the existing market...
More power to you, I guess.
Or, well, actually less, but you know what I mean.
Step 1) Yes, you do download it. As Verilog source code (or *gag* VHDL)
Step 2) Synthesize (and simulate if you don't trust the guys who designed it)
Step 3a) Upload to FPGA (the coolest EE toy *ever*)
-or-
Step 3b) Send to fab of your choice (along with a big wad of cash) to be put in "real" silicon
Step 4) Enjoy your new chip
Maybe today open hardware is an esoteric industry. But with self-assembling circuits being the way things are heading (What? IBM's announcement of self-assembling FLASH didn't make Slashdot? Shame on the mods.) that'll change. Why? Because the most practical way to make dense circuits will be as an FPGA where the self-assembling units are not FLASH modules but FPGA cells. In effect, all major components become FPGAs.
:v)
But it won't stop there. Turning this new capability to its advantage, it will make sense to re-compile the CPU cores to perform the task at hand with maximum efficiency. If you're going to start doing that, an open design is nigh on essential.
We are rapidly entering an era where it is worth designing things that cannot yet be built, because the manufacturing technology is catching up very rapidly. Even now, Sony are designing their consumer device chipsets as FPGAs to shorten time to market. The trend will not decrease.
Vik
Of course, you'd never see old designs here, the standards bar moves up too fast.
Xix.
"Everything is adjustable, provided you have the right tools"
You can buy a suprisingly good FPGA (Field Programmable Gate Array) development board fullay assembled and ready to go for around $300 US (for 300K gates, 2 UARTS, VGA, Keyboard, Mouse, etc)...
That's a crapload of configurable logic for peanuts.
But wait! There's a ton of stuff available at www.opencores.org to play with. Some of it is already GPL'ed. There's processors, FPUs, USB cores and all sorts of other stuff.
Of course, it's hard to get FPGA's that run upwards of 150MHz right now, but they've been growing by leaps and bounds lately. If you want to learn to do some logic design, pick up a book on VHDL or Verilog and go to town!
My $0.02
does this thing get?
Comment removed based on user account deletion
Comment removed based on user account deletion
In space, no-one can hear you kernel panic.
Karma: It's all a bunch of tree-huggin' hippy crap!
That is -by far- the stupidest porn I've ever seem. You have to be some sort of fucking invalid-crack baby to think that is hot.
You are twisted, sicko. Abnormal fuck... god... bet you don't even leave your room. You just jack off to 99% gay porn like that... green... cow whatever.
Sick, sick, sick. At least you won't be a predator, though. In case you haven't noticed, there are no such things as what's in that picture.
You slashdotted VCL Sweden. From an A/C post no less. I guess slashdotters are naturally curious.
Hardware Modo: Measure Twice. Cut Once. Software Modo: Release Often! Software is more conducive to Open Source development... Non?
The cost of R&D and design of the chip is probably a drop in the bucket compared to building a chip fabrication plant. And much of it the advances required to make a fast chips would be in fabrication technologies (materials, layering, etc.) that might has nothing to do with the chip design. And these technologies are likely to be patented.
I have to add few facts about this OpenCores project.
... well... we learn everyday something new.
A gentleman (??) who started this project had a great opportunity
to build his chip 3 years ago in Silicon Valley, California.
In return for a 6 months salary, rent car, paid apartment,
he promised to deliver a chip.
Real result: salary was paid (ooops... did he paid taxes in his
native country ? did he paid taxes in USA ?? hmmm interesting question)
rent car was paid, apartment was paid.
Chip WAS NOT delivered. ( Gentleman had a lot of foggy excuses
and left the country)
So, 3 years later, he is back through Flextronics.
His moral, ethical and values were 3 years ago very flexible.
I thought that open source (free source) developers have higher standards
than this gentleman.
Ohhh
I personally think this shift will be as big as the shift from stone tools to blacksmithing or from blacksmithing to use of lathes.
guys,
while i'm sure the opencores crowd has done an outstanding job, you need to look further at the Big Picture.... and comparable processors.
a motorola ppc8245 at 300MHz is $19 in qty (at least that's what we pay). it has all of the features enumerated in the article above (16K caches, PCI, MMU, ethernet, dual UARTs, etc etc etc), and is supplied replete with a Big DataBook of We're Pretty Damn Sure This Will Work Knowledge and 10e6 embedded programmers worldwide. not to mention an entire library of (linux AND powerpc) Google entries. you can attach all manner of BDM/BDI/JTAG debuggers (e.g. BDI2000) to an 82xx and there are a half dozen compiler suites (including gcc) to choose from. boundary scan routines are already understood and implemented, which eases ICT development at production time. if it's 2AM the day before the Big Pitch to the client, i'm pretty sure i can find someone who's awake and can fix my 82xx register access problem. i'm no motorola bigot (i always try to make a PIC fit until it can't do the job) but the economies of scale are WAY WAY WAY against the little guy when it comes to microprocessors.
you are not selling your soul to moto for $19. you are making a cost effective, performance increasing, risk reducing decision, that's all.
just another datapoint.
OpenRISC is a nice project, but it still follows older design. I believe there could be a lot of real innovation where OSH meets OSS - reconfigurable hardware supported maybe as deep as the OS kernel.
Great! It won't be long now, until my flying car's computer has an automatically recompiling CPU!
I'm sure were less than a decade away... No really, I mean it this time...
Slashdot gets worse every day... Pipedot: News for nerds, without the corporate slant
I, for one, welcome our new OpenRISC overlords!
So when can we expect that Bi-turbo dual-G5 NSX with intercooler and traction control that does 0-60^H^H^H^H OS boot in less than 3 seconds?
--Coder
Wow, he is one busy fella' working also as a transmission engineer and with AT&T's telco division. So I hear ya got the scoop on the new cloning technologies, eh?
placed on us via Pheniox doing away with the BIOS and others trying to make hardware "Trusted".
Look up that Slashdot article. Makes this important.
Never answer an anonymous letter. - Yogi Berra
Lets see than what is?
Websphere-Apache?
MacOSX-Darwin?
JBoss?
come one poor slashdot poster do a little thinking please!
Don't Tread on OpenSource
I don't know about you guys,
but I'm sick of the "ATA RAID"
cards that really are just
software based raid. Could
someone please strap 4 SATA
interfaces on this board, so
we can build a real Raid 0/1/5
card?
And with GPL software of course!
-Brett
With open source software, we have already seen great software progress, both in quantity and quality. The competition between open source developers and closed source/commercial ones is paying off, with Linux having reached a status that it is a viable alternative to MS Windows.
But with hardware, it is a different story. Open source hardware development is restrained by physical resources and its costs. Although an a small scale, we may see many examples, I wonder if and when it will be possible to compete with the big boys. Not in the quantity arena, of course, but in the design arena: will the open source hardware developers have better ideas when it comes to chip design ? will they outsmart their commercial competitors, since they will not have the pressure to sell to keep going ?
1.4W for a 160MHz RISC (which should be around 160MIPS) is a poor MIPS/Watt ratio. I realize that's for that entire board, but I will try to make the best comparisons I can. 114 MIPS/Watt (I'm guessing 160MIPS/Watt for the bare chip)
a VIA C3 800 + motherboard is about 12W. Given the CISCy instructionset you get about 1200MIPS on that. so 100MIPS/Watt (200MIPS/Watt bare) [don't believe me? many claim this chip gets 1600MIPS, but they are probably reading BogoMIPS as MIPS. still, it's an extremely fast integer chip, especially considing $/Watt]
an Intel XScale 600MHz is also RISC and lets ignore the ARM Thumb instruction set, you will get about 600MIPS out of that as well. But just the bare chip is only 0.5W. Lets say inside your favorite PDA that chip is 2.5Watts. 240MIPS/Watt. (1200MIPS/Watt if you run it bare)
Personally I have a very low opionion of Transmeta. But lets say you get a 700MHz transmeta. The bare chip is 1W, on a laptop motherboard let's say it's 4.5W. Now transmeta's MIPS performance isn't quite as sexy as CISC or even RISC. Let's just for the sake of argument it gets an even 700MIPS (which it doesn't). That's 156MIPS/Watt (700MIPS/Watt for the bare cpu).
So the winners are:
XScale @ 240MIPS/Watt
Tranmeta @ 156MIPS/Watt
OpenRISC(Flextronics) @ 114MIPS/Watt
VIA C3 @ 100MIPS/Watt
ps- the reason I tried to compare everything on a motherboard is because that is the only practical way to use such a chip. This is done to show power consumpution from a consumer's point of view. (looking back perhaps I should have compared battery life in simular products).
If you're a product designer you might be more comfortable with the raw MIPS/Watts, assuming that the periphal chipsets available for each product runs roughly the same watts for the same functionality. (which isn't the case for any of these, as you can see by my motherboard wattages).
“Common sense is not so common.” — Voltaire
field programmable gate array (google for it if u dont know)
When I think of open, I think of "FREE". Are they giving the hardware away? No, I know. I am just being picky, but that's the way I think. I think. *cragen
With open hardware, the manufacturere can get the pattern for basicly free, make the part, and make the final product less expensive. Overall, it reduces the cost of the final product, which most people would agree is a good thing.
It will likely be a while before open hardware can compete in speed/complexity with the likes of Pentium IV or Athlon. But most other supporting parts are realistic choices for open design.
There is nothing so silly as other peoples traditions, and nothing so sacred as our own.
This is the future, i was shizoiding about in posts time ago.
I use Xilinx FPGAs, which are both cheap and super powerful. For the company, i am woring for, i am developing digital signal poccessing processors and software for them using FPGA. one twenty dollar FPGA can process extremely high-order filters and analyzers on samplerates as high as hundred MHz, which we use for microwave communication in extremely baad environments.
With my addiction to open sources i am on developing a open-hardware computer (for a long time already)and will put online all sources, schematics, cerbers, layouts, so any Geeky guy (or Woman -- Jennifer E. Elaan? sorry if i am wrong) will be able to put together one, or buy components and ask somebody who can.
You would say You might need license for buying FPGAs used in by militaries for missle targeting (yes!) - then You would would be right. However there are no problem to by those in russia or anywhere else without having any license.
So hold on for a home-brew computer era coming back (from the times we were assembling Sinclair ZX Spectrums 16k and 48k at our homes:). How those computers will reincarnate from tv-calculators to plaforms being able to "process" (remove:) macrovizions, copyright bits on multiple streams, as well as directly capture satellite broadcast and process it.
Only drawback is that it will be with its own OS - BrainOS i am working on at te time. Just because it will be programmed not in sequential language, but parralel (VHDL) as it will be embedded in hardware (however modifiable by user at any time -- fpga!). We should be ready about that we could not (legally:) build any x86 on it, as we will have no license from intel. But i don't miss them. For running old x86 software and games we can use old x86 computers, which are widely available in trashmarkets.
asap i will try to do some artickle on this and try to post it there, that we could discuss what is ood and what is not).. Leave me some personal message if You are interested in it, so i could see how many of us are interested in this project. I hope it to be the same as linux is for software world, it could be for hardware world.
There are hundreds of them. They even have their own "society".
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The extra wiring capacitance and the overhead of unusable components creates a severe performance disadvantage for any FPGA design. The performance gains of reprogramming hardware to exactly meet the requirements of a particular job must be very substantial to overcome the inherent weakness of an FPGA for general purpose computing.
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You could say the same thing about CPUs vs. custom hardware (I had a computer architecture professor continually rant about the von Neumann (sic) straightjacket). The question is, will the manufactuability of FPGAs beat even custom silicon? It's certainly a blue sky thing, but don't be too surprised. A 3d reversable (or other low power) FPGA that can be custom routed around bad cells will trounce custom 2d silicon. Remember, CPUs are limited by the length of the wire the signal has to propagate over (by inductance, not C). Going to 3d eases those problems tremendously, and the two problems with that are manufacturing (unlike smaller design rules, there is no manufacturing benifit) and heat generation (which has to seriously change in order to continue shrinking transistors). In the end O(n^3) will beat O(n^2).
The reason this is decades off:
1. It requires self assembly.
2. It requires unbelievably low power (for 3d)
3. It requires local compilation specific to an individual chip (to avoid bad cells). Expect this to drop performance by an order of magnitude (possibly less, depending on your autorouter).
On the other hand, keeping Moore's law "on the books" requires redefining what photolithography means every few years. Don't be too surprised if this is needed.
Wumpus
Parent poster is either a troll or a fool.
The GPL governs redistribution, not use. If you have a copy of GPL'd source, regardless of how you got it, you may use it. Period. If you wish to redistribute it, you may do so, if and only if you accept the GPL. It's a very simple concept.
An end-user cannot run afoul of the GPL even accidentally as he does not create and distribute binary packages. If he did, he would not be an end-user.
-Hope
Parent should be -1, arrant nonsense. Haven't you heard of the phrase, "jack of all trades, master of none"? The flexibility of FPGAs comes at the cost of unused resources; any part of each logic cell not needed to perform the selected task is wasted. Those unused resources indirectly translate to lower clock frequencies, higher power consumption, and higher manufacturing costs when compared to a hardwired design for volume production.
Parent should be -1, arrant nonsense.
Haven't you heard of the phrase, "jack of all trades, master of none"? The flexibility of FPGAs comes at the cost of unused resources; any part of each logic cell not needed to perform the selected task is wasted. Those unused resources indirectly translate to lower clock frequencies, higher power consumption, and higher manufacturing costs when compared to a hardwired design for volume production.
The unique license is GPL :) (free business)
open4free
A very fine achievement.
You are right of course, who needs Bill's Bloatware?
someone needs to mod this funny :-)