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From Silicon To Microprocessors
prostoalex writes "Jim Turley from Embedded Systems Programming magazine answers the question of where microprocessors come from. While the public generally knows about the silicon and microprocessor vendors, few can describe the process of turning the beach sand into the latest and greatest several-hundred-dollars-worth CPU."
I'd always thought these materials were made in hot, dry climates, like Arizona, yet there was a supplier right in my backyard.
A feeling of having made the same mistake before: Deja Foobar
The only thing I don't like about the process is the working conditions: annoyingly loud!
:)
For those of you that have never been in a clean room, there is a tremendous amount of ambient sound due to the very important air cleaning/circulation system. In order to make the clean room "clean", there can only be so much dust particles in the air. (e.g. 1ppm) (there are actually different classes of clean rooms)
The ramification of this is that one can hardly hear one's voice. Personally, I'm glad I'm not in the semiconductor field
If you can visit Santa Clara USA then Intel's museum has a nice introduction to the process of turning sand into chips.
"Don't belong. Never join. Think for yourself. Peace." V.Stone, Microsoft Corporation
Have a look at MEMC's website (www.memc.com), they produce silicon wafers like the ones in the article. The site has some nice pics and animations of their manufacturing process.
Having smaller die sizes is not good just because you can put more dies on a wafer. It is because your yield will improve. Dust/contamination is the real enemey, and bigger dies have an (exponentially or even worse) higher risk of having one dust particle destroying the chip function. Cutting the size with 10% may well lower the production cost by 50%.
.18 to .13) can be a real money saver (next to allowing higher clock rates).
And that is ofcourse why moving to a smaller technology (eg from
But as far as an article targeted at a total layperson goes, it's okay. Not that most laypeople don't quickly lose interest when you start talking about wafers, masks, reticles, photoresist, process steps. You always have to start with the broader concepts and see when their eyes glaze over:
What do you do?
I work at a place that makes computer chips
Oh really? What kinds?
All kinds. I work in the ASICS group.
ASICS? Like the sneakers?
Who do you get to be an expert to tell you something's not obvious? The least insightful person you can find? -J Roberts
I guess focus could certainly be a problem, but as far as wafer sized masks go, if you're creating a mask that costs many thousands of dollars, you're far less likely to have a defect in the mask if the mask is only the size needed for one die, and not the entire wafer. And since certain masks are not 1:1 masks but 2:1 or 4:1 masks, you'd might need a 1200mm mask for 4x a 300mm wafer. A 1.2 meter mask. See a problem?
Who do you get to be an expert to tell you something's not obvious? The least insightful person you can find? -J Roberts
They don't use beachsand, that's silicon dioxide (SiO2), also known as quartz.
Pure silicon chunks are actually made from condensing a very pure Silicon gas called Silane. The chunks are broken up, and melted in a very hot furnace, with a crucible made out of quartz(usually). Any doping, or impurities to give the silicon it's different electrical properties are added at this point. Boron (B) is fairly common.
Then, a nice perfect seed crystal of silicon is dipped into the molten silicon which starts to crystalize around the seed crystal. The growing crystal is turned and slowly pulled out of the liquid silicon as it grows to help keep it regular. The result is called a boule, or "the bologna looking thing"
As a side note, the doping is usually too high at the top of the boule, and too low at the end of the boule, so only about the middle 25% is used.
Then it gets sliced into wafers. etc. etc.
There are more than a few nits...
.13u, .18u, or larger.
(1) Silicon is not sand. Sand is silicon dioxide (well, most sand). It needs to be reduced (the oxygen needs to be removed) and purified. And purified. And purified. (I believe Brazilian quartz is actually the preferred stock for silicon dioxide, rather than sand, due to its purity.)
(2) Photo-resist does not need to be electrically conductive. It does need to be capable of resisting attack by whatever chemicals are next in the step (especially the HF). Since they're usually polymers that are either polymerized or depolymerized by the exposure, they generally are not conductive.
(3) Current generation laser steppers are not EUV. (They are UV, maybe DUV, being slightly less than 1/2 the wavelength of visible indigo.)
(4) One could get the impression that each chip on the wafer is processed separately at each step.
(5) Fabs and foundries are related but distinct entities. (I personally have worked in a fab, but never a foundry.)
(6) It's the mask that is imprinted on the wafer's photoresist, not the chip.
(7) Moore's law is incorrectly repeated. This is especially bad because it claims to be correcting the common belief (which it probably is). Moore's law was about the economics of chip density -- the most _cost effective_ density doubles every 18 months.
(8) I've usually heard and talked about individual die and multiple dice. (And breaking up wafers into chips is called dicing.) Maybe others call them (plural) die, but not everyone.
(9) The 200mm wafer area calculations are wrong. A 200mm wafer has a radius of 10cm; the area is therefore (10)^2*pi ~= 310cm^2. So one won't get 986 die from a square wafer and only 279 from a round one.
(10) Lots and lots of companies don't build their chips on the smallest feature sizes possible. Very few can afford to manufacture 90nm chips at this point, so the bulk of chip _designs_ are manufactured at
There are probably many more errors...
RJ
To work in a bunny suit on the production floor? A high school diploma is often enough. To work in test/yield improvement? An EE degree, perhaps. To actually develop the bleeding edge processes? A PhD in physics.
There's far more to it than that, of course. And the actual chip designers could be across the parking lot or around the world.
Who do you get to be an expert to tell you something's not obvious? The least insightful person you can find? -J Roberts
Unless you are talking about a clean room from the late 70s or the 80s, its more likely that the noise you are hearing is from the exhaust systems sucking fumes from processing equipment.
The materials used to produce semiconductors are extremely deadly to humans as are many of the process by products.
Pretty much every processing tool has multiple exhaust connections which remove potentially harmful fumes to a scrubbing system on the roof that removes the toxic chemicals which are then treated and disposed.
There are other noises from the tools and support equipment but I assume you thought it was the laminar air flow filtering system because it sounded like high volume air movement. They do move high volumes of air but you don't want the air moving too fast as it will stir up any particles that may be present in the room.
burnin
oh, I do work in a clean room, have since 1989.
Square ( or rectangular) because the silicon crystal lattice wants to break along perpendicular directions and square because a diamond wheel doesnt change directions very easily. Any other shape would result in more broken chips and lower yield and higher prices.
Facts are history now plebs have politics for religion on social media.
* when cutting the ingots, people almost ALWAYS use a ring-blade; where the blade is on the inner edge of a ring larger than the ingot, and ingot is sliced. extra points for anyone who know why.**
* ingots are not always "grown." (think dipping candles) there is also a technique where you start off with a polychrystaline ingot and use localized heating to progressively monocrystalize it by localized melting. The technique is similar to one of the methods of removing impurities from iron bars.
* CMP is damn cool. I mean, it's nice and all hearing about "polish to within an atom" precision, but if you take a polished wafer, it would make the best mirror you'd ever own. Granted silicon is not the perfect reflective surface, but you won't get a mirror more accuratly shows every feature on your face. =) Otoh, when dusts and stuff DO get into the CMP machines, though, it scratches the wafer. Though you don't see it, when you trace failures on the wafer the failing gates would generally follow an arc shape (corresponding to the wafer and polishing head rotation), and from that you get the CMP machine checked out.
random junk I thought that was kinda neat.
** I used to know about 3 years ago but then I forgot. so don't expect like a correct answer or nothing.
My life in the land of the rising sun.