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Sun Sacks UltraSparc V and 3300 Employees
bender writes "According to this article, Sun Microsystems has cancelled the next generation UltraSparc V processor even though the chip had already taped out. Perhaps this has something to do with the recent partnerships with AMD and Fujitsu?"
Please, if you're going to enourage your readerbase to read an article, please do the same.
Sun said nothing about laying off the Ultrasparc V or Gemini staff.
"Sun plans to lay off 3,300 employees, but many from the UltraSparc V and Gemini projects will remain at Sun, the spokeswoman said."
You mean here
Another story is here, which explains things a bit more clearly.
RTFA. The UltraSPARC line isn't being cancelled, just the UltraSPARC V, which is based on an entirely different core than the IV, and has nothing to do with what its successor would have used. They're avoiding supporting an architecture that will pop up and go away in the space of a few years, and minimizing the stress on their customers that might otherwise be facing changing from one chip architecture to another in a relatively short span of time.
You can never go home again... but I guess you can shop there.
The vast majority of money put toward a chip is in the design, not the manufacturing.
The intro only talks about it being taped out. That isn't the end of the design effort. In fact, that's when the really expensive validation work begins. Now its true that the amount of people (and thus salaries) goes down, but the really expensive validation phase ususally consumes more than half the R&D of a development. Heck, a single machine configuration to run benchmarks runs in the Millions of dollars (US).
to the Engineer, the glass is neither half full nor half empty. Its just two times too big.
They didn't give up on it... they finished it.
.5Million just for the mask set.
Not quite. Big chips almost never work right the first time. Minor design changes are always required. Best case, Ultrasparc V was months and millions of dollars away from done. Each "spin" throught he fab is
I suspect the situation for Ultrasparc V was worse than that. If they had truly taped out then the chip would already be in the fab. More likely, the database was in condition that it could have been fabed but it was not meeting performance targets.
x86 CPUs have very few registers to save, so hardware context switches (the x86 does have them via TSS segments) don't buy you anything.
Hardware context switching is not why SPARC machines can handle huge amounts of load. The handle huge amounts of load because they have crossbar memory controllers, multiple I/O busses, and an OS (Solaris) especially tuned for high load situations.
A deep unwavering belief is a sure sign you're missing something...